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Commit 3cd3c83f authored by Yixun Lan's avatar Yixun Lan Committed by Linus Walleij
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pinctrl: Add compatibles for Amlogic Meson G12A pin controllers 



Add new compatible name for Amlogic's Meson-G12A pin controllers,
add a dt-binding header file which document the detail pin names.

Acked-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarXingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: default avatarYixun Lan <yixun.lan@amlogic.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 3b588e43

Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

+2 −0
Original line number Diff line number Diff line
@@ -13,6 +13,8 @@ Required properties for the root node: 
		      "amlogic,meson-gxl-aobus-pinctrl"

		      "amlogic,meson-axg-periphs-pinctrl"

		      "amlogic,meson-axg-aobus-pinctrl"

		      "amlogic,meson-g12a-periphs-pinctrl"

		      "amlogic,meson-g12a-aobus-pinctrl"

 - reg: address and size of registers controlling irq functionality



=== GPIO sub-nodes ===

include/dt-bindings/gpio/meson-g12a-gpio.h

0 → 100644
+114 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */

/*

 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.

 * Author: Xingyu Chen <xingyu.chen@amlogic.com>

 */



#ifndef _DT_BINDINGS_MESON_G12A_GPIO_H

#define _DT_BINDINGS_MESON_G12A_GPIO_H



/* First GPIO chip */

#define GPIOAO_0	0

#define GPIOAO_1	1

#define GPIOAO_2	2

#define GPIOAO_3	3

#define GPIOAO_4	4

#define GPIOAO_5	5

#define GPIOAO_6	6

#define GPIOAO_7	7

#define GPIOAO_8	8

#define GPIOAO_9	9

#define GPIOAO_10	10

#define GPIOAO_11	11

#define GPIOE_0		12

#define GPIOE_1		13

#define GPIOE_2		14



/* Second GPIO chip */

#define GPIOZ_0		0

#define GPIOZ_1		1

#define GPIOZ_2		2

#define GPIOZ_3		3

#define GPIOZ_4		4

#define GPIOZ_5		5

#define GPIOZ_6		6

#define GPIOZ_7		7

#define GPIOZ_8		8

#define GPIOZ_9		9

#define GPIOZ_10	10

#define GPIOZ_11	11

#define GPIOZ_12	12

#define GPIOZ_13	13

#define GPIOZ_14	14

#define GPIOZ_15	15

#define GPIOH_0		16

#define GPIOH_1		17

#define GPIOH_2		18

#define GPIOH_3		19

#define GPIOH_4		20

#define GPIOH_5		21

#define GPIOH_6		22

#define GPIOH_7		23

#define GPIOH_8		24

#define BOOT_0		25

#define BOOT_1		26

#define BOOT_2		27

#define BOOT_3		28

#define BOOT_4		29

#define BOOT_5		30

#define BOOT_6		31

#define BOOT_7		32

#define BOOT_8		33

#define BOOT_9		34

#define BOOT_10		35

#define BOOT_11		36

#define BOOT_12		37

#define BOOT_13		38

#define BOOT_14		39

#define BOOT_15		40

#define GPIOC_0		41

#define GPIOC_1		42

#define GPIOC_2		43

#define GPIOC_3		44

#define GPIOC_4		45

#define GPIOC_5		46

#define GPIOC_6		47

#define GPIOC_7		48

#define GPIOA_0		49

#define GPIOA_1		50

#define GPIOA_2		51

#define GPIOA_3		52

#define GPIOA_4		53

#define GPIOA_5		54

#define GPIOA_6		55

#define GPIOA_7		56

#define GPIOA_8		57

#define GPIOA_9		58

#define GPIOA_10	59

#define GPIOA_11	60

#define GPIOA_12	61

#define GPIOA_13	62

#define GPIOA_14	63

#define GPIOA_15	64

#define GPIOX_0		65

#define GPIOX_1		66

#define GPIOX_2		67

#define GPIOX_3		68

#define GPIOX_4		69

#define GPIOX_5		70

#define GPIOX_6		71

#define GPIOX_7		72

#define GPIOX_8		73

#define GPIOX_9		74

#define GPIOX_10	75

#define GPIOX_11	76

#define GPIOX_12	77

#define GPIOX_13	78

#define GPIOX_14	79

#define GPIOX_15	80

#define GPIOX_16	81

#define GPIOX_17	82

#define GPIOX_18	83

#define GPIOX_19	84



#endif /* _DT_BINDINGS_MESON_G12A_GPIO_H */