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Commit 3c6cb20a authored by Kaike Wan's avatar Kaike Wan Committed by Doug Ledford
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IB/hfi1: Add TID RDMA WRITE functionality into RDMA verbs 



This patch integrates TID RDMA WRITE protocol into normal RDMA verbs
framework. The TID RDMA WRITE protocol is an end-to-end protocol
between the hfi1 drivers on two OPA nodes that converts a qualified
RDMA WRITE request into a TID RDMA WRITE request to avoid data copying
on the responder side.

Reviewed-by: default avatarMike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: default avatarMitko Haralanov <mitko.haralanov@intel.com>
Signed-off-by: default avatarKaike Wan <kaike.wan@intel.com>
Signed-off-by: default avatarDennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent 572f0c33

drivers/infiniband/hw/hfi1/qp.c

+7 −0
Original line number Diff line number Diff line
@@ -138,6 +138,12 @@ const struct rvt_operation_params hfi1_post_parms[RVT_OPERATION_MAX] = { 
	.flags = RVT_OPERATION_USE_RESERVE,

},



[IB_WR_TID_RDMA_WRITE] = {

	.length = sizeof(struct ib_rdma_wr),

	.qpt_support = BIT(IB_QPT_RC),

	.flags = RVT_OPERATION_IGN_RNR_CNT,

},



};



static void flush_list_head(struct list_head *l)
@@ -780,6 +786,7 @@ void quiesce_qp(struct rvt_qp *qp) 
	struct hfi1_qp_priv *priv = qp->priv;



	hfi1_del_tid_reap_timer(qp);

	hfi1_del_tid_retry_timer(qp);

	iowait_sdma_drain(&priv->s_iowait);

	qp_pio_drain(qp);

	flush_tx_list(qp);

drivers/infiniband/hw/hfi1/rc.c

+440 −47

File changed.

Preview size limit exceeded, changes collapsed.

drivers/infiniband/hw/hfi1/tid_rdma.c

+14 −0
Original line number Diff line number Diff line
@@ -3205,6 +3205,20 @@ void hfi1_qp_kern_exp_rcv_clear_all(struct rvt_qp *qp) 
		do {

			struct hfi1_swqe_priv *priv = wqe->priv;



			ret = hfi1_kern_exp_rcv_clear(&priv->tid_req);

		} while (!ret);

	}

	for (i = qp->s_acked_ack_queue; i != qp->r_head_ack_queue;) {

		struct rvt_ack_entry *e = &qp->s_ack_queue[i];



		if (++i == rvt_max_atomic(ib_to_rvt(qp->ibqp.device)))

			i = 0;

		/* Free only locally allocated TID entries */

		if (e->opcode != TID_OP(WRITE_REQ))

			continue;

		do {

			struct hfi1_ack_priv *priv = e->priv;



			ret = hfi1_kern_exp_rcv_clear(&priv->tid_req);

		} while (!ret);

	}

drivers/infiniband/hw/hfi1/user_sdma.c

+2 −1
Original line number Diff line number Diff line
@@ -1126,7 +1126,8 @@ static inline u32 set_pkt_bth_psn(__be32 bthpsn, u8 expct, u32 frags) 
			0xffffffull),

		psn = val & mask;

	if (expct)

		psn = (psn & ~BTH_SEQ_MASK) | ((psn + frags) & BTH_SEQ_MASK);

		psn = (psn & ~HFI1_KDETH_BTH_SEQ_MASK) |

			((psn + frags) & HFI1_KDETH_BTH_SEQ_MASK);

	else

		psn = psn + frags;

	return psn & mask;

drivers/infiniband/hw/hfi1/verbs.c

+16 −1
Original line number Diff line number Diff line
@@ -161,6 +161,7 @@ MODULE_PARM_DESC(wss_clean_period, "Count of verbs copies before an entry in the 
 */

const enum ib_wc_opcode ib_hfi1_wc_opcode[] = {

	[IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,

	[IB_WR_TID_RDMA_WRITE] = IB_WC_RDMA_WRITE,

	[IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,

	[IB_WR_SEND] = IB_WC_SEND,

	[IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
@@ -203,6 +204,12 @@ const u8 hdr_len_by_opcode[256] = { 
	[IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE]      = 12 + 8 + 4,

	[IB_OPCODE_TID_RDMA_READ_REQ]                 = 12 + 8 + 36,

	[IB_OPCODE_TID_RDMA_READ_RESP]                = 12 + 8 + 36,

	[IB_OPCODE_TID_RDMA_WRITE_REQ]                = 12 + 8 + 36,

	[IB_OPCODE_TID_RDMA_WRITE_RESP]               = 12 + 8 + 36,

	[IB_OPCODE_TID_RDMA_WRITE_DATA]               = 12 + 8 + 36,

	[IB_OPCODE_TID_RDMA_WRITE_DATA_LAST]          = 12 + 8 + 36,

	[IB_OPCODE_TID_RDMA_ACK]                      = 12 + 8 + 36,

	[IB_OPCODE_TID_RDMA_RESYNC]                   = 12 + 8 + 36,

	/* UC */

	[IB_OPCODE_UC_SEND_FIRST]                     = 12 + 8,

	[IB_OPCODE_UC_SEND_MIDDLE]                    = 12 + 8,
@@ -248,8 +255,14 @@ static const opcode_handler opcode_handler_tbl[256] = { 
	[IB_OPCODE_RC_SEND_ONLY_WITH_INVALIDATE]      = &hfi1_rc_rcv,



	/* TID RDMA has separate handlers for different opcodes.*/

	[IB_OPCODE_TID_RDMA_WRITE_REQ]       = &hfi1_rc_rcv_tid_rdma_write_req,

	[IB_OPCODE_TID_RDMA_WRITE_RESP]      = &hfi1_rc_rcv_tid_rdma_write_resp,

	[IB_OPCODE_TID_RDMA_WRITE_DATA]      = &hfi1_rc_rcv_tid_rdma_write_data,

	[IB_OPCODE_TID_RDMA_WRITE_DATA_LAST] = &hfi1_rc_rcv_tid_rdma_write_data,

	[IB_OPCODE_TID_RDMA_READ_REQ]        = &hfi1_rc_rcv_tid_rdma_read_req,

	[IB_OPCODE_TID_RDMA_READ_RESP]       = &hfi1_rc_rcv_tid_rdma_read_resp,

	[IB_OPCODE_TID_RDMA_RESYNC]          = &hfi1_rc_rcv_tid_rdma_resync,

	[IB_OPCODE_TID_RDMA_ACK]             = &hfi1_rc_rcv_tid_rdma_ack,



	/* UC */

	[IB_OPCODE_UC_SEND_FIRST]                     = &hfi1_uc_rcv,
@@ -1332,7 +1345,9 @@ static void hfi1_fill_device_attr(struct hfi1_devdata *dd) 
	rdi->dparms.props.max_mr_size = U64_MAX;

	rdi->dparms.props.max_fast_reg_page_list_len = UINT_MAX;

	rdi->dparms.props.max_qp = hfi1_max_qps;

	rdi->dparms.props.max_qp_wr = hfi1_max_qp_wrs;

	rdi->dparms.props.max_qp_wr =

		(hfi1_max_qp_wrs >= HFI1_QP_WQE_INVALID ?

		 HFI1_QP_WQE_INVALID - 1 : hfi1_max_qp_wrs);

	rdi->dparms.props.max_send_sge = hfi1_max_sges;

	rdi->dparms.props.max_recv_sge = hfi1_max_sges;

	rdi->dparms.props.max_sge_rd = hfi1_max_sges;