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Commit 3c07cc24 authored by Marc Zyngier's avatar Marc Zyngier Committed by Greg Kroah-Hartman
Browse files

irqchip/gic-v3: Fix GICR_CTLR.RWP polling 



commit 0df6664531a12cdd8fc873f0cac0dcb40243d3e9 upstream.

It turns out that our polling of RWP is totally wrong when checking
for it in the redistributors, as we test the *distributor* bit index,
whereas it is a different bit number in the RDs... Oopsie boo.

This is embarassing. Not only because it is wrong, but also because
it took *8 years* to notice the blunder...

Just fix the damn thing.

Fixes: 021f6537 ("irqchip: gic-v3: Initial support for GICv3")
Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
Cc: stable@vger.kernel.org
Reviewed-by: default avatarAndre Przywara <andre.przywara@arm.com>
Reviewed-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Link: https://lore.kernel.org/r/20220315165034.794482-2-maz@kernel.org


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent e44d6af1

drivers/irqchip/irq-gic-v3.c

+4 −4
Original line number Diff line number Diff line
@@ -162,11 +162,11 @@ static inline void __iomem *gic_dist_base(struct irq_data *d) 
	}

}



static void gic_do_wait_for_rwp(void __iomem *base)

static void gic_do_wait_for_rwp(void __iomem *base, u32 bit)

{

	u32 count = 1000000;	/* 1s! */



	while (readl_relaxed(base + GICD_CTLR) & GICD_CTLR_RWP) {

	while (readl_relaxed(base + GICD_CTLR) & bit) {

		count--;

		if (!count) {

			pr_err_ratelimited("RWP timeout, gone fishing\n");
@@ -180,13 +180,13 @@ static void gic_do_wait_for_rwp(void __iomem *base) 
/* Wait for completion of a distributor change */

static void gic_dist_wait_for_rwp(void)

{

	gic_do_wait_for_rwp(gic_data.dist_base);

	gic_do_wait_for_rwp(gic_data.dist_base, GICD_CTLR_RWP);

}



/* Wait for completion of a redistributor change */

static void gic_redist_wait_for_rwp(void)

{

	gic_do_wait_for_rwp(gic_data_rdist_rd_base());

	gic_do_wait_for_rwp(gic_data_rdist_rd_base(), GICR_CTLR_RWP);

}



#ifdef CONFIG_ARM64