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Commit 3b90a3b2 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: remove redundant check for usermem type"

parents 1150df1e 4d2b26fb

drivers/gpu/msm/adreno_a6xx.c

+10 −3
Original line number Diff line number Diff line
@@ -1404,25 +1404,32 @@ static int a6xx_irq_poll_fence(struct adreno_device *adreno_dev) 
{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	u32 status, fence, fence_retries = 0;

	u64 a, b, c;



	if (!gmu_core_isenabled(device))

		return 0;



	a = a6xx_read_alwayson(adreno_dev);



	kgsl_regread(device, A6XX_GMU_AO_AHB_FENCE_CTRL, &fence);



	while (fence != 0) {

		b = a6xx_read_alwayson(adreno_dev);



		/* Wait for small time before trying again */

		udelay(1);

		kgsl_regread(device, A6XX_GMU_AO_AHB_FENCE_CTRL, &fence);



		if (fence_retries == 100 && fence != 0) {

			c = a6xx_read_alwayson(adreno_dev);



			kgsl_regread(device, A6XX_GMU_RBBM_INT_UNMASKED_STATUS,

				&status);



			dev_crit_ratelimited(device->dev,

				"status=0x%x Unmasked status=0x%x Mask=0x%x\n",

				"status=0x%x Unmasked status=0x%x Mask=0x%x timestamps: %llx %llx %llx\n",

					status & adreno_dev->irq_mask, status,

					adreno_dev->irq_mask);

					adreno_dev->irq_mask, a, b, c);

				return -ETIMEDOUT;

		}
@@ -2312,7 +2319,7 @@ static void a6xx_platform_setup(struct adreno_device *adreno_dev) 
	adreno_dev->perfctr_pwr_lo = A6XX_GMU_CX_GMU_POWER_COUNTER_XOCLK_0_L;



	/* Set the counter for IFPC */

	if (gmu_core_isenabled(KGSL_DEVICE(adreno_dev)))

	if (ADRENO_FEATURE(adreno_dev, ADRENO_IFPC))

		adreno_dev->perfctr_ifpc_lo =

			A6XX_GMU_CX_GMU_POWER_COUNTER_XOCLK_4_L;

}

drivers/gpu/msm/adreno_a6xx_gmu.c

+18 −12
Original line number Diff line number Diff line
@@ -919,12 +919,9 @@ static int a6xx_gmu_wait_for_lowest_idle(struct kgsl_device *device) 


	/* Collect abort data to help with debugging */

	gmu_core_regread(device, A6XX_GPU_GMU_AO_GPU_CX_BUSY_STATUS, &reg2);

	kgsl_regread(device, A6XX_CP_STATUS_1, &reg3);

	gmu_core_regread(device, A6XX_GMU_RBBM_INT_UNMASKED_STATUS, &reg4);

	gmu_core_regread(device, A6XX_GMU_GMU_PWR_COL_KEEPALIVE, &reg5);

	kgsl_regread(device, A6XX_CP_CP2GMU_STATUS, &reg6);

	kgsl_regread(device, A6XX_CP_CONTEXT_SWITCH_CNTL, &reg7);

	gmu_core_regread(device, A6XX_GMU_AO_SPARE_CNTL, &reg8);

	gmu_core_regread(device, A6XX_GMU_RBBM_INT_UNMASKED_STATUS, &reg3);

	gmu_core_regread(device, A6XX_GMU_GMU_PWR_COL_KEEPALIVE, &reg4);

	gmu_core_regread(device, A6XX_GMU_AO_SPARE_CNTL, &reg5);



	dev_err(&gmu->pdev->dev,

		"----------------------[ GMU error ]----------------------\n");
@@ -938,14 +935,23 @@ static int a6xx_gmu_wait_for_lowest_idle(struct kgsl_device *device) 
		ts3-ts2);

	dev_err(&gmu->pdev->dev,

		"RPMH_POWER_STATE=%x SPTPRAC_PWR_CLK_STATUS=%x\n", reg, reg1);

	dev_err(&gmu->pdev->dev,

		"CX_BUSY_STATUS=%x CP_STATUS_1=%x\n", reg2, reg3);

	dev_err(&gmu->pdev->dev, "CX_BUSY_STATUS=%x\n", reg2);

	dev_err(&gmu->pdev->dev,

		"RBBM_INT_UNMASKED_STATUS=%x PWR_COL_KEEPALIVE=%x\n",

		reg4, reg5);

		reg3, reg4);

	dev_err(&gmu->pdev->dev, "A6XX_GMU_AO_SPARE_CNTL=%x\n", reg5);



	/* Access GX registers only when GX is ON */

	if (is_on(reg1)) {

		kgsl_regread(device, A6XX_CP_STATUS_1, &reg6);

		kgsl_regread(device, A6XX_CP_CP2GMU_STATUS, &reg7);

		kgsl_regread(device, A6XX_CP_CONTEXT_SWITCH_CNTL, &reg8);



		dev_err(&gmu->pdev->dev, "A6XX_CP_STATUS_1=%x\n", reg6);

		dev_err(&gmu->pdev->dev,

		"CP2GMU_STATUS=%x CONTEXT_SWITCH_CNTL=%x AO_SPARE_CNTL=%x\n",

		reg6, reg7, reg8);

			"CP2GMU_STATUS=%x CONTEXT_SWITCH_CNTL=%x\n",

			reg7, reg8);

	}



	WARN_ON(1);

	return -ETIMEDOUT;

drivers/gpu/msm/kgsl.c

+3 −6
Original line number Diff line number Diff line
@@ -494,8 +494,6 @@ static int kgsl_mem_entry_attach_process(struct kgsl_device *device, 
/* Detach a memory entry from a process and unmap it from the MMU */

static void kgsl_mem_entry_detach_process(struct kgsl_mem_entry *entry)

{

	unsigned int type;



	if (entry == NULL)

		return;
@@ -508,9 +506,6 @@ static void kgsl_mem_entry_detach_process(struct kgsl_mem_entry *entry) 
		idr_remove(&entry->priv->mem_idr, entry->id);

	entry->id = 0;



	type = kgsl_memdesc_usermem_type(&entry->memdesc);



	if (type != KGSL_MEM_ENTRY_ION)

	entry->priv->gpumem_mapped -= entry->memdesc.mapsize;



	spin_unlock(&entry->priv->mem_lock);
@@ -4659,6 +4654,8 @@ static int kgsl_mmap(struct file *file, struct vm_area_struct *vma) 
			vm_insert_page(vma, addr, page);

			addr += PAGE_SIZE;

		}

		m->mapsize = m->size;

		entry->priv->gpumem_mapped += m->mapsize;

	}



	vma->vm_file = file;

drivers/gpu/msm/kgsl_gmu.c

+1 −1
Original line number Diff line number Diff line
@@ -240,7 +240,7 @@ static struct gmu_memdesc *allocate_gmu_kmem(struct gmu_device *gmu, 


	case GMU_NONCACHED_USER:

		/* Set start address for first uncached user alloc */

		if (next_uncached_kernel_alloc == 0)

		if (next_uncached_user_alloc == 0)

			next_uncached_user_alloc = gmu->vma[mem_type].start;



		if (addr == 0)

drivers/gpu/msm/kgsl_gmu_core.c

+1 −1
Original line number Diff line number Diff line
@@ -277,7 +277,7 @@ int gmu_core_dev_wait_for_lowest_idle(struct kgsl_device *device) 
	struct gmu_dev_ops *ops = GMU_DEVICE_OPS(device);



	if (ops && ops->wait_for_lowest_idle)

		ops->wait_for_lowest_idle(device);

		return ops->wait_for_lowest_idle(device);



	return 0;

}