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Commit 3b647be2 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'dwmac-dwc-qos-eth'



Joao Pinto says:

====================
adding new glue driver dwmac-dwc-qos-eth

This patch set contains the porting of the synopsys/dwc_eth_qos.c driver
to the stmmac structure. This operation resulted in the creation of a new
platform glue driver called dwmac-dwc-qos-eth which was based in the
dwc_eth_qos as is.

dwmac-dwc-qos-eth inherited dwc_eth_qos DT bindings, to assure that current
and old users can continue to use it as before. We can see this driver as
being deprecated, since all new development will be done in stmmac.

Please check each patch for implementation details.
====================

Tested-by: default avatarNiklas Cassel <niklas.cassel@axis.com>
Reviewed-by: default avatarLars Persson <larper@axis.com>
Acked-by: default avatarAlexandre TORGUE <alexandre.torgue@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 3a7f75e5 d8256121
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* Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)

This binding is deprecated, but it continues to be supported, but new
features should be preferably added to the stmmac binding document.

This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
IP block. The IP supports multiple options for bus type, clocking and reset
structure, and feature list. Consequently, a number of properties and list
+2 −0
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@@ -49,6 +49,8 @@ Optional properties:
- snps,force_sf_dma_mode	Force DMA to use the Store and Forward
				mode for both tx and rx. This flag is
				ignored if force_thresh_dma_mode is set.
- snps,en-tx-lpi-clockgating	Enable gating of the MAC TX clock during
				TX low-power mode
- snps,multicast-filter-bins:	Number of multicast filter hash bins
				supported by this device instance
- snps,perfect-filter-entries:	Number of perfect filter entries supported
+9 −0
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@@ -29,6 +29,15 @@ config STMMAC_PLATFORM

if STMMAC_PLATFORM

config DWMAC_DWC_QOS_ETH
	tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
	select PHYLIB
	select CRC32
	select MII
	depends on OF && HAS_DMA
	help
	  Support for chips using the snps,dwc-qos-ethernet.txt DT binding.

config DWMAC_GENERIC
	tristate "Generic driver for DWMAC"
	default STMMAC_PLATFORM
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@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
obj-$(CONFIG_DWMAC_STI)		+= dwmac-sti.o
obj-$(CONFIG_DWMAC_STM32)	+= dwmac-stm32.o
obj-$(CONFIG_DWMAC_SUNXI)	+= dwmac-sunxi.o
obj-$(CONFIG_DWMAC_DWC_QOS_ETH)	+= dwmac-dwc-qos-eth.o
obj-$(CONFIG_DWMAC_GENERIC)	+= dwmac-generic.o
stmmac-platform-objs:= stmmac_platform.o
dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
+2 −1
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@@ -476,7 +476,8 @@ struct stmmac_ops {
			      unsigned int reg_n);
	void (*get_umac_addr)(struct mac_device_info *hw, unsigned char *addr,
			      unsigned int reg_n);
	void (*set_eee_mode)(struct mac_device_info *hw);
	void (*set_eee_mode)(struct mac_device_info *hw,
			     bool en_tx_lpi_clockgating);
	void (*reset_eee_mode)(struct mac_device_info *hw);
	void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
	void (*set_eee_pls)(struct mac_device_info *hw, int link);
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