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Commit 3b4654ca authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: revise gold memlat tables for lahaina v2"

parents 62ede5df 5e08f37b

qcom/lahaina-v2.dtsi

+10 −4
Original line number Diff line number Diff line
@@ -155,6 +155,12 @@ 
		< 1766400 1248000000 >,

		< 2112000 1324800000 >,

		< 2419200 1516800000 >,

		< 2841600 1593600000 >;

};



&cpu7_l3_computemon {

	qcom,core-dev-table =

		< 2592000 300000000 >,

		< 2814600 1593600000 >;

};
@@ -195,7 +201,7 @@ 
		< 1075200 MHZ_TO_MBPS(  466, 16) >,

		< 1324800 MHZ_TO_MBPS(  600, 16) >,

		< 1881600 MHZ_TO_MBPS(  806, 16) >,

		< 2726400 MHZ_TO_MBPS(  933, 16) >,

		< 2592000 MHZ_TO_MBPS(  933, 16) >,

		< 2841600 MHZ_TO_MBPS( 1000, 16) >;

};
@@ -221,7 +227,7 @@ 
			<  844800 MHZ_TO_MBPS( 547, 4) >,

			< 1075200 MHZ_TO_MBPS( 768, 4) >,

			< 1881600 MHZ_TO_MBPS(1555, 4) >,

			< 2726400 MHZ_TO_MBPS(2092, 4) >,

			< 2592000 MHZ_TO_MBPS(2092, 4) >,

			< 2841600 MHZ_TO_MBPS(3196, 4) >;

	};

};
@@ -252,14 +258,14 @@ 
	ddr4-map {

		qcom,ddr-type = <DDR_TYPE_LPDDR4X>;

		qcom,core-dev-table =

			< 2726400 MHZ_TO_MBPS( 200, 4) >,

			< 2592000 MHZ_TO_MBPS( 200, 4) >,

			< 2841600 MHZ_TO_MBPS(2133, 4) >;

	};



	ddr5-map {

		qcom,ddr-type = <DDR_TYPE_LPDDR5>;

		qcom,core-dev-table =

			< 2726400 MHZ_TO_MBPS( 200, 4) >,

			< 2592000 MHZ_TO_MBPS( 200, 4) >,

			< 2841600 MHZ_TO_MBPS(3196, 4) >;

	};

};

qcom/lahaina.dtsi

+18 −0
Original line number Diff line number Diff line
@@ -3748,6 +3748,16 @@ 
			 &epss_l3_cpu SLAVE_EPSS_L3_CPU7>;

	};



	cpu7_cpu_l3_latfloor: qcom,cpu7-cpu-l3-latfloor {

		compatible = "qcom,devfreq-icc-l3";

		reg = <0x18590100 0xa0>;

		reg-names = "ftbl-base";

		governor = "compute";

		interconnects =

			<&epss_l3_cpu MASTER_EPSS_L3_APPS

			 &epss_l3_cpu SLAVE_EPSS_L3_SHARED>;

	};



	snoop_l3_bw: qcom,snoop-l3-bw {

		compatible = "qcom,devfreq-icc-l3bw";

		reg = <0x18590100 0xa0>;
@@ -3968,6 +3978,14 @@ 
			qcom,core-dev-table = <&cpu4_cpu_l3_tbl>;

		};



		cpu7_l3_computemon: qcom,cpu7-l3-computemon {

			compatible = "qcom,arm-compute-mon";

			qcom,target-dev = <&cpu7_cpu_l3_latfloor>;

			qcom,core-dev-table =

				< 2304000  300000000 >,

				< 2400000 1516800000 >;

		};



		cpu4_cpu_llcc_latmon: qcom,cpu4-cpu-llcc-latmon {

			compatible = "qcom,arm-memlat-mon";

			qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;