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Commit 3b2249f3 authored by Shreyas K K's avatar Shreyas K K
Browse files

ARM: dts: msm: Add DPC property for SM8150 

Add "dynamic-power-coefficient" property to all cores.
The "capacity-dmips-mhz" and "dynamic-power-coefficient"
are used to build Energy Model which in turn used by EAS to
take placement decisions.

Change-Id: I9cc9f97116b5aa9cdf9f3b6e250b30a170db910c
parent c483e77b

qcom/sm8150.dtsi

+8 −0
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ 
			enable-method = "psci";

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_0>;

			qcom,freq-domain = <&cpufreq_hw 0 4>;

			L2_0: l2-cache {
@@ -75,6 +76,7 @@ 
			enable-method = "psci";

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_1>;

			qcom,freq-domain = <&cpufreq_hw 0 4>;

			L2_1: l2-cache {
@@ -91,6 +93,7 @@ 
			enable-method = "psci";

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_2>;

			qcom,freq-domain = <&cpufreq_hw 0 4>;

			L2_2: l2-cache {
@@ -107,6 +110,7 @@ 
			enable-method = "psci";

			cpu-idle-states = <&SLVR_RAIL_OFF>;

			capacity-dmips-mhz = <1024>;

			dynamic-power-coefficient = <100>;

			next-level-cache = <&L2_3>;

			qcom,freq-domain = <&cpufreq_hw 0 4>;

			L2_3: l2-cache {
@@ -123,6 +127,7 @@ 
			enable-method = "psci";

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			capacity-dmips-mhz = <1740>;

			dynamic-power-coefficient = <374>;

			next-level-cache = <&L2_4>;

			qcom,freq-domain = <&cpufreq_hw 1 4>;

			L2_4: l2-cache {
@@ -139,6 +144,7 @@ 
			enable-method = "psci";

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			capacity-dmips-mhz = <1740>;

			dynamic-power-coefficient = <374>;

			next-level-cache = <&L2_5>;

			qcom,freq-domain = <&cpufreq_hw 1 4>;

			L2_5: l2-cache {
@@ -155,6 +161,7 @@ 
			enable-method = "psci";

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			capacity-dmips-mhz = <1740>;

			dynamic-power-coefficient = <374>;

			next-level-cache = <&L2_6>;

			qcom,freq-domain = <&cpufreq_hw 1 4>;

			L2_6: l2-cache {
@@ -171,6 +178,7 @@ 
			enable-method = "psci";

			cpu-idle-states = <&GOLD_RAIL_OFF>;

			capacity-dmips-mhz = <1740>;

			dynamic-power-coefficient = <431>;

			next-level-cache = <&L2_7>;

			qcom,freq-domain = <&cpufreq_hw 2 4>;

			L2_7: l2-cache {