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Commit 3ae19b75 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: add wait_for_vblank asic callback



Required for future functionality.

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarJerome Glisse <jglisse@redhat.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent e5bcf234
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+19 −0
Original line number Original line Diff line number Diff line
@@ -99,6 +99,25 @@ void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
	}
	}
}
}


void dce4_wait_for_vblank(struct radeon_device *rdev, int crtc)
{
	struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
	int i;

	if (RREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_MASTER_EN) {
		for (i = 0; i < rdev->usec_timeout; i++) {
			if (!(RREG32(EVERGREEN_CRTC_STATUS + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_V_BLANK))
				break;
			udelay(1);
		}
		for (i = 0; i < rdev->usec_timeout; i++) {
			if (RREG32(EVERGREEN_CRTC_STATUS + radeon_crtc->crtc_offset) & EVERGREEN_CRTC_V_BLANK)
				break;
			udelay(1);
		}
	}
}

void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc)
void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc)
{
{
	/* enable the pflip int */
	/* enable the pflip int */
+1 −0
Original line number Original line Diff line number Diff line
@@ -219,6 +219,7 @@
#       define EVERGREEN_CRTC_MASTER_EN                 (1 << 0)
#       define EVERGREEN_CRTC_MASTER_EN                 (1 << 0)
#       define EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE (1 << 24)
#       define EVERGREEN_CRTC_DISP_READ_REQUEST_DISABLE (1 << 24)
#define EVERGREEN_CRTC_STATUS                           0x6e8c
#define EVERGREEN_CRTC_STATUS                           0x6e8c
#       define EVERGREEN_CRTC_V_BLANK                   (1 << 0)
#define EVERGREEN_CRTC_STATUS_POSITION                  0x6e90
#define EVERGREEN_CRTC_STATUS_POSITION                  0x6e90
#define EVERGREEN_MASTER_UPDATE_MODE                    0x6ef8
#define EVERGREEN_MASTER_UPDATE_MODE                    0x6ef8
#define EVERGREEN_CRTC_UPDATE_LOCK                      0x6ed4
#define EVERGREEN_CRTC_UPDATE_LOCK                      0x6ed4
+34 −0
Original line number Original line Diff line number Diff line
@@ -65,6 +65,40 @@ MODULE_FIRMWARE(FIRMWARE_R520);


#include "r100_track.h"
#include "r100_track.h"


void r100_wait_for_vblank(struct radeon_device *rdev, int crtc)
{
	struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc];
	int i;

	if (radeon_crtc->crtc_id == 0) {
		if (RREG32(RADEON_CRTC_GEN_CNTL) & RADEON_CRTC_EN) {
			for (i = 0; i < rdev->usec_timeout; i++) {
				if (!(RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR))
					break;
				udelay(1);
			}
			for (i = 0; i < rdev->usec_timeout; i++) {
				if (RREG32(RADEON_CRTC_STATUS) & RADEON_CRTC_VBLANK_CUR)
					break;
				udelay(1);
			}
		}
	} else {
		if (RREG32(RADEON_CRTC2_GEN_CNTL) & RADEON_CRTC2_EN) {
			for (i = 0; i < rdev->usec_timeout; i++) {
				if (!(RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR))
					break;
				udelay(1);
			}
			for (i = 0; i < rdev->usec_timeout; i++) {
				if (RREG32(RADEON_CRTC2_STATUS) & RADEON_CRTC2_VBLANK_CUR)
					break;
				udelay(1);
			}
		}
	}
}

/* This files gather functions specifics to:
/* This files gather functions specifics to:
 * r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
 * r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280
 */
 */
+2 −0
Original line number Original line Diff line number Diff line
@@ -351,6 +351,8 @@
#define AVIVO_D1CRTC_BLANK_CONTROL                              0x6084
#define AVIVO_D1CRTC_BLANK_CONTROL                              0x6084
#define AVIVO_D1CRTC_INTERLACE_CONTROL                          0x6088
#define AVIVO_D1CRTC_INTERLACE_CONTROL                          0x6088
#define AVIVO_D1CRTC_INTERLACE_STATUS                           0x608c
#define AVIVO_D1CRTC_INTERLACE_STATUS                           0x608c
#define AVIVO_D1CRTC_STATUS                                     0x609c
#       define AVIVO_D1CRTC_V_BLANK                             (1 << 0)
#define AVIVO_D1CRTC_STATUS_POSITION                            0x60a0
#define AVIVO_D1CRTC_STATUS_POSITION                            0x60a0
#define AVIVO_D1CRTC_FRAME_COUNT                                0x60a4
#define AVIVO_D1CRTC_FRAME_COUNT                                0x60a4
#define AVIVO_D1CRTC_STEREO_CONTROL                             0x60c4
#define AVIVO_D1CRTC_STEREO_CONTROL                             0x60c4
+3 −0
Original line number Original line Diff line number Diff line
@@ -1204,6 +1204,8 @@ struct radeon_asic {
	void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
	void (*pre_page_flip)(struct radeon_device *rdev, int crtc);
	u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
	u32 (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base);
	void (*post_page_flip)(struct radeon_device *rdev, int crtc);
	void (*post_page_flip)(struct radeon_device *rdev, int crtc);
	/* wait for vblank */
	void (*wait_for_vblank)(struct radeon_device *rdev, int crtc);
};
};


/*
/*
@@ -1692,6 +1694,7 @@ void radeon_ring_write(struct radeon_ring *ring, uint32_t v);
#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pre_page_flip((rdev), (crtc))
#define radeon_pre_page_flip(rdev, crtc) rdev->asic->pre_page_flip((rdev), (crtc))
#define radeon_page_flip(rdev, crtc, base) rdev->asic->page_flip((rdev), (crtc), (base))
#define radeon_page_flip(rdev, crtc, base) rdev->asic->page_flip((rdev), (crtc), (base))
#define radeon_post_page_flip(rdev, crtc) rdev->asic->post_page_flip((rdev), (crtc))
#define radeon_post_page_flip(rdev, crtc) rdev->asic->post_page_flip((rdev), (crtc))
#define radeon_wait_for_vblank(rdev, crtc) rdev->asic->wait_for_vblank((rdev), (crtc))


/* Common functions */
/* Common functions */
/* AGP */
/* AGP */
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