Loading dp/wifi3.0/dp_peer.c +2 −3 Original line number Diff line number Diff line /* * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the Loading Loading @@ -3529,9 +3530,7 @@ int dp_addba_requestprocess_wifi3(struct cdp_soc_t *cdp_soc, buffersize = rx_tid->rx_ba_win_size_override; } else { QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO, "%s restore BA win %d based on addba req", __func__, buffersize); dp_info("restore BA win %d based on addba req", buffersize); } dp_check_ba_buffersize(peer, tid, buffersize); Loading hal/wifi3.0/qca6750/hal_6750.c +4 −0 Original line number Diff line number Diff line Loading @@ -2242,7 +2242,11 @@ struct hal_hw_srng_config hw_srng_table_6750[] = { }, { /* WBM2SW_RELEASE */ .start_ring_id = HAL_SRNG_WBM2SW0_RELEASE, #ifdef CONFIG_PLD_IPCIE_FW_SIM .max_rings = 5, #else .max_rings = 4, #endif .entry_size = sizeof(struct wbm_release_ring) >> 2, .lmac_ring = FALSE, .ring_dir = HAL_SRNG_DST_RING, Loading hif/inc/hif.h +0 −30 Original line number Diff line number Diff line Loading @@ -1657,36 +1657,6 @@ ssize_t hif_ce_en_desc_hist(struct hif_softc *scn, const char *buf, size_t size); ssize_t hif_disp_ce_enable_desc_data_hist(struct hif_softc *scn, char *buf); ssize_t hif_dump_desc_event(struct hif_softc *scn, char *buf); /** * hif_ce_debug_history_prealloc_init() - alloc ce debug history memory * * alloc ce debug history memory with driver init, so such memory can * be existed even after stop module. * on ini value. * * Return: QDF_STATUS_SUCCESS for success, other for fail. */ QDF_STATUS hif_ce_debug_history_prealloc_init(void); /** * hif_ce_debug_history_prealloc_deinit() - free ce debug history memory * * free ce debug history memory when driver deinit. * * Return: QDF_STATUS_SUCCESS for success, other for fail. */ QDF_STATUS hif_ce_debug_history_prealloc_deinit(void); #else static inline QDF_STATUS hif_ce_debug_history_prealloc_init(void) { return QDF_STATUS_SUCCESS; } static inline QDF_STATUS hif_ce_debug_history_prealloc_deinit(void) { return QDF_STATUS_SUCCESS; } #endif/*#if defined(HIF_CONFIG_SLUB_DEBUG_ON)||defined(HIF_CE_DEBUG_DATA_BUF)*/ /** Loading hif/src/ce/ce_main.c +22 −55 Original line number Diff line number Diff line Loading @@ -1453,71 +1453,41 @@ void free_mem_ce_debug_hist_data(struct hif_softc *scn, uint32_t ce_id) #ifndef HIF_CE_DEBUG_DATA_DYNAMIC_BUF #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) struct hif_ce_desc_event *hif_ce_desc_history[CE_COUNT_MAX]; /* define this variable for crashscope parse */ /* define below variables for crashscope parse */ struct hif_ce_desc_event *hif_ce_desc_history[CE_COUNT_MAX]; uint32_t hif_ce_history_max = HIF_CE_HISTORY_MAX; /** * hif_ce_debug_only_enable_ce2_ce3() - if only enable ce2/ce3 debug * This is different config for perf/debug buid version. * for debug build, it will enable ce history for all ce, but for * perf build(if CONFIG_SLUB_DEBUG_ON is N), it only enable for * ce2(wmi event) & ce3(wmi cmd) history. * * Return: true if only enable ce2/ce3 debug, otherwise false. */ #if defined(CONFIG_SLUB_DEBUG_ON) static inline bool hif_ce_debug_only_enable_ce2_ce3(void) { return false; } #define CE_DESC_HISTORY_BUFF_CNT CE_COUNT_MAX #define IS_CE_DEBUG_ONLY_FOR_CE2_CE3 FALSE #else static inline bool hif_ce_debug_only_enable_ce2_ce3(void) { return true; } #define CE_DESC_HISTORY_BUFF_CNT 2 #define IS_CE_DEBUG_ONLY_FOR_CE2_CE3 TRUE #endif struct hif_ce_desc_event hif_ce_desc_history_buff[CE_DESC_HISTORY_BUFF_CNT][HIF_CE_HISTORY_MAX]; QDF_STATUS hif_ce_debug_history_prealloc_deinit(void) { int ce_id; for (ce_id = 0; ce_id < CE_COUNT_MAX; ce_id++) { if (hif_ce_desc_history[ce_id]) { qdf_mem_free(hif_ce_desc_history[ce_id]); hif_ce_desc_history[ce_id] = NULL; } } hif_debug("ce debug memory freed"); return QDF_STATUS_SUCCESS; } QDF_STATUS hif_ce_debug_history_prealloc_init(void) static struct hif_ce_desc_event * hif_ce_debug_history_buf_get(unsigned int ce_id) { int ce_id; hif_debug("alloc ce debug memory, only_ce2/ce3 %d", hif_ce_debug_only_enable_ce2_ce3()); for (ce_id = 0; ce_id < CE_COUNT_MAX; ce_id++) { if (hif_ce_debug_only_enable_ce2_ce3() && ce_id != CE_ID_2 && ce_id != CE_ID_3) { hif_ce_desc_history[ce_id] = NULL; continue; } hif_debug("get ce debug buffer ce_id %u, only_ce2/ce3=%d", ce_id, IS_CE_DEBUG_ONLY_FOR_CE2_CE3); if (IS_CE_DEBUG_ONLY_FOR_CE2_CE3 && (ce_id == CE_ID_2 || ce_id == CE_ID_3)) { hif_ce_desc_history[ce_id] = qdf_mem_malloc(HIF_CE_HISTORY_MAX * sizeof(struct hif_ce_desc_event)); if (!hif_ce_desc_history[ce_id]) { hif_ce_debug_history_prealloc_deinit(); return QDF_STATUS_E_NOMEM; } hif_ce_desc_history_buff[ce_id - CE_ID_2]; } else { hif_ce_desc_history[ce_id] = hif_ce_desc_history_buff[ce_id]; } return QDF_STATUS_SUCCESS; return hif_ce_desc_history[ce_id]; } /** Loading @@ -1534,7 +1504,8 @@ alloc_mem_ce_debug_history(struct hif_softc *scn, unsigned int ce_id, struct ce_desc_hist *ce_hist = &scn->hif_ce_desc_hist; QDF_STATUS status = QDF_STATUS_SUCCESS; if (hif_ce_debug_only_enable_ce2_ce3() && /* For perf build, return directly for non ce2/ce3 */ if (IS_CE_DEBUG_ONLY_FOR_CE2_CE3 && ce_id != CE_ID_2 && ce_id != CE_ID_3) { ce_hist->enable[ce_id] = false; Loading @@ -1542,11 +1513,7 @@ alloc_mem_ce_debug_history(struct hif_softc *scn, unsigned int ce_id, return QDF_STATUS_SUCCESS; } if (!hif_ce_desc_history[ce_id]) { hif_err("prealloc memory failed"); return QDF_STATUS_E_NOMEM; } ce_hist->hist_ev[ce_id] = hif_ce_desc_history[ce_id]; ce_hist->hist_ev[ce_id] = hif_ce_debug_history_buf_get(ce_id); ce_hist->enable[ce_id] = true; if (src_nentries) { Loading hif/src/hif_main.c +5 −1 Original line number Diff line number Diff line /* * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved. * * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the * above copyright notice and this permission notice appear in all Loading Loading @@ -1056,6 +1057,9 @@ QDF_STATUS hif_try_prevent_ep_vote_access(struct hif_opaque_softc *hif_ctx) qdf_sleep(10); } if (pld_is_pci_ep_awake(scn->qdf_dev->dev) == -ENOTSUPP) return QDF_STATUS_SUCCESS; while (pld_is_pci_ep_awake(scn->qdf_dev->dev)) { if (++wait_cnt > HIF_EP_WAKE_RESET_WAIT_CNT) { hif_err("Release EP vote is not proceed by Fw"); Loading Loading
dp/wifi3.0/dp_peer.c +2 −3 Original line number Diff line number Diff line /* * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the Loading Loading @@ -3529,9 +3530,7 @@ int dp_addba_requestprocess_wifi3(struct cdp_soc_t *cdp_soc, buffersize = rx_tid->rx_ba_win_size_override; } else { QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO, "%s restore BA win %d based on addba req", __func__, buffersize); dp_info("restore BA win %d based on addba req", buffersize); } dp_check_ba_buffersize(peer, tid, buffersize); Loading
hal/wifi3.0/qca6750/hal_6750.c +4 −0 Original line number Diff line number Diff line Loading @@ -2242,7 +2242,11 @@ struct hal_hw_srng_config hw_srng_table_6750[] = { }, { /* WBM2SW_RELEASE */ .start_ring_id = HAL_SRNG_WBM2SW0_RELEASE, #ifdef CONFIG_PLD_IPCIE_FW_SIM .max_rings = 5, #else .max_rings = 4, #endif .entry_size = sizeof(struct wbm_release_ring) >> 2, .lmac_ring = FALSE, .ring_dir = HAL_SRNG_DST_RING, Loading
hif/inc/hif.h +0 −30 Original line number Diff line number Diff line Loading @@ -1657,36 +1657,6 @@ ssize_t hif_ce_en_desc_hist(struct hif_softc *scn, const char *buf, size_t size); ssize_t hif_disp_ce_enable_desc_data_hist(struct hif_softc *scn, char *buf); ssize_t hif_dump_desc_event(struct hif_softc *scn, char *buf); /** * hif_ce_debug_history_prealloc_init() - alloc ce debug history memory * * alloc ce debug history memory with driver init, so such memory can * be existed even after stop module. * on ini value. * * Return: QDF_STATUS_SUCCESS for success, other for fail. */ QDF_STATUS hif_ce_debug_history_prealloc_init(void); /** * hif_ce_debug_history_prealloc_deinit() - free ce debug history memory * * free ce debug history memory when driver deinit. * * Return: QDF_STATUS_SUCCESS for success, other for fail. */ QDF_STATUS hif_ce_debug_history_prealloc_deinit(void); #else static inline QDF_STATUS hif_ce_debug_history_prealloc_init(void) { return QDF_STATUS_SUCCESS; } static inline QDF_STATUS hif_ce_debug_history_prealloc_deinit(void) { return QDF_STATUS_SUCCESS; } #endif/*#if defined(HIF_CONFIG_SLUB_DEBUG_ON)||defined(HIF_CE_DEBUG_DATA_BUF)*/ /** Loading
hif/src/ce/ce_main.c +22 −55 Original line number Diff line number Diff line Loading @@ -1453,71 +1453,41 @@ void free_mem_ce_debug_hist_data(struct hif_softc *scn, uint32_t ce_id) #ifndef HIF_CE_DEBUG_DATA_DYNAMIC_BUF #if defined(HIF_CONFIG_SLUB_DEBUG_ON) || defined(HIF_CE_DEBUG_DATA_BUF) struct hif_ce_desc_event *hif_ce_desc_history[CE_COUNT_MAX]; /* define this variable for crashscope parse */ /* define below variables for crashscope parse */ struct hif_ce_desc_event *hif_ce_desc_history[CE_COUNT_MAX]; uint32_t hif_ce_history_max = HIF_CE_HISTORY_MAX; /** * hif_ce_debug_only_enable_ce2_ce3() - if only enable ce2/ce3 debug * This is different config for perf/debug buid version. * for debug build, it will enable ce history for all ce, but for * perf build(if CONFIG_SLUB_DEBUG_ON is N), it only enable for * ce2(wmi event) & ce3(wmi cmd) history. * * Return: true if only enable ce2/ce3 debug, otherwise false. */ #if defined(CONFIG_SLUB_DEBUG_ON) static inline bool hif_ce_debug_only_enable_ce2_ce3(void) { return false; } #define CE_DESC_HISTORY_BUFF_CNT CE_COUNT_MAX #define IS_CE_DEBUG_ONLY_FOR_CE2_CE3 FALSE #else static inline bool hif_ce_debug_only_enable_ce2_ce3(void) { return true; } #define CE_DESC_HISTORY_BUFF_CNT 2 #define IS_CE_DEBUG_ONLY_FOR_CE2_CE3 TRUE #endif struct hif_ce_desc_event hif_ce_desc_history_buff[CE_DESC_HISTORY_BUFF_CNT][HIF_CE_HISTORY_MAX]; QDF_STATUS hif_ce_debug_history_prealloc_deinit(void) { int ce_id; for (ce_id = 0; ce_id < CE_COUNT_MAX; ce_id++) { if (hif_ce_desc_history[ce_id]) { qdf_mem_free(hif_ce_desc_history[ce_id]); hif_ce_desc_history[ce_id] = NULL; } } hif_debug("ce debug memory freed"); return QDF_STATUS_SUCCESS; } QDF_STATUS hif_ce_debug_history_prealloc_init(void) static struct hif_ce_desc_event * hif_ce_debug_history_buf_get(unsigned int ce_id) { int ce_id; hif_debug("alloc ce debug memory, only_ce2/ce3 %d", hif_ce_debug_only_enable_ce2_ce3()); for (ce_id = 0; ce_id < CE_COUNT_MAX; ce_id++) { if (hif_ce_debug_only_enable_ce2_ce3() && ce_id != CE_ID_2 && ce_id != CE_ID_3) { hif_ce_desc_history[ce_id] = NULL; continue; } hif_debug("get ce debug buffer ce_id %u, only_ce2/ce3=%d", ce_id, IS_CE_DEBUG_ONLY_FOR_CE2_CE3); if (IS_CE_DEBUG_ONLY_FOR_CE2_CE3 && (ce_id == CE_ID_2 || ce_id == CE_ID_3)) { hif_ce_desc_history[ce_id] = qdf_mem_malloc(HIF_CE_HISTORY_MAX * sizeof(struct hif_ce_desc_event)); if (!hif_ce_desc_history[ce_id]) { hif_ce_debug_history_prealloc_deinit(); return QDF_STATUS_E_NOMEM; } hif_ce_desc_history_buff[ce_id - CE_ID_2]; } else { hif_ce_desc_history[ce_id] = hif_ce_desc_history_buff[ce_id]; } return QDF_STATUS_SUCCESS; return hif_ce_desc_history[ce_id]; } /** Loading @@ -1534,7 +1504,8 @@ alloc_mem_ce_debug_history(struct hif_softc *scn, unsigned int ce_id, struct ce_desc_hist *ce_hist = &scn->hif_ce_desc_hist; QDF_STATUS status = QDF_STATUS_SUCCESS; if (hif_ce_debug_only_enable_ce2_ce3() && /* For perf build, return directly for non ce2/ce3 */ if (IS_CE_DEBUG_ONLY_FOR_CE2_CE3 && ce_id != CE_ID_2 && ce_id != CE_ID_3) { ce_hist->enable[ce_id] = false; Loading @@ -1542,11 +1513,7 @@ alloc_mem_ce_debug_history(struct hif_softc *scn, unsigned int ce_id, return QDF_STATUS_SUCCESS; } if (!hif_ce_desc_history[ce_id]) { hif_err("prealloc memory failed"); return QDF_STATUS_E_NOMEM; } ce_hist->hist_ev[ce_id] = hif_ce_desc_history[ce_id]; ce_hist->hist_ev[ce_id] = hif_ce_debug_history_buf_get(ce_id); ce_hist->enable[ce_id] = true; if (src_nentries) { Loading
hif/src/hif_main.c +5 −1 Original line number Diff line number Diff line /* * Copyright (c) 2015-2021 The Linux Foundation. All rights reserved. * * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the * above copyright notice and this permission notice appear in all Loading Loading @@ -1056,6 +1057,9 @@ QDF_STATUS hif_try_prevent_ep_vote_access(struct hif_opaque_softc *hif_ctx) qdf_sleep(10); } if (pld_is_pci_ep_awake(scn->qdf_dev->dev) == -ENOTSUPP) return QDF_STATUS_SUCCESS; while (pld_is_pci_ep_awake(scn->qdf_dev->dev)) { if (++wait_cnt > HIF_EP_WAKE_RESET_WAIT_CNT) { hif_err("Release EP vote is not proceed by Fw"); Loading