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Commit 3a65dd4e authored by Tomas Winkler's avatar Tomas Winkler Committed by Greg Kroah-Hartman
Browse files

mei: move hw dependent functions to interface.c 



1. move direct register handling to interface.c and make them static
2. add new function mei_clear_interrupts that wraps direct register
access
3. export other functions in mei_dev.h

Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent db7da79d

drivers/misc/mei/init.c

+1 −2
Original line number Diff line number Diff line
@@ -142,8 +142,7 @@ int mei_hw_init(struct mei_device *dev) 
	    dev->host_hw_state, dev->me_hw_state);



	/* acknowledge interrupt and stop interupts */

	if ((dev->host_hw_state & H_IS) == H_IS)

		mei_reg_write(dev, H_CSR, dev->host_hw_state);

	mei_clear_interrupts(dev);



	/* Doesn't change in runtime */

	dev->hbuf_depth = (dev->host_hw_state & H_CBD) >> 24;

drivers/misc/mei/interface.c

+90 −2
Original line number Diff line number Diff line
@@ -20,7 +20,61 @@ 
#include "mei_dev.h"

#include "interface.h"



/**

 * mei_reg_read - Reads 32bit data from the mei device

 *

 * @dev: the device structure

 * @offset: offset from which to read the data

 *

 * returns register value (u32)

 */

static inline u32 mei_reg_read(const struct mei_device *dev,

			       unsigned long offset)

{

	return ioread32(dev->mem_addr + offset);

}





/**

 * mei_reg_write - Writes 32bit data to the mei device

 *

 * @dev: the device structure

 * @offset: offset from which to write the data

 * @value: register value to write (u32)

 */

static inline void mei_reg_write(const struct mei_device *dev,

				 unsigned long offset, u32 value)

{

	iowrite32(value, dev->mem_addr + offset);

}



/**

 * mei_hcsr_read - Reads 32bit data from the host CSR

 *

 * @dev: the device structure

 *

 * returns the byte read.

 */

u32 mei_hcsr_read(const struct mei_device *dev)

{

	return mei_reg_read(dev, H_CSR);

}



u32 mei_mecbrw_read(const struct mei_device *dev)

{

	return mei_reg_read(dev, ME_CB_RW);

}

/**

 * mei_mecsr_read - Reads 32bit data from the ME CSR

 *

 * @dev: the device structure

 *

 * returns ME_CSR_HA register value (u32)

 */

u32 mei_mecsr_read(const struct mei_device *dev)

{

	return mei_reg_read(dev, ME_CSR_HA);

}



/**

 * mei_set_csr_register - writes H_CSR register to the mei device,
@@ -37,7 +91,18 @@ void mei_hcsr_set(struct mei_device *dev) 
}



/**

 * mei_csr_enable_interrupts - enables mei device interrupts

 * mei_enable_interrupts - clear and stop interrupts

 *

 * @dev: the device structure

 */

void mei_clear_interrupts(struct mei_device *dev)

{

	if ((dev->host_hw_state & H_IS) == H_IS)

		mei_reg_write(dev, H_CSR, dev->host_hw_state);

}



/**

 * mei_enable_interrupts - enables mei device interrupts

 *

 * @dev: the device structure

 */
@@ -48,7 +113,7 @@ void mei_enable_interrupts(struct mei_device *dev) 
}



/**

 * mei_csr_disable_interrupts - disables mei device interrupts

 * mei_disable_interrupts - disables mei device interrupts

 *

 * @dev: the device structure

 */
@@ -58,6 +123,29 @@ void mei_disable_interrupts(struct mei_device *dev) 
	mei_hcsr_set(dev);

}





/**

 * mei_interrupt_quick_handler - The ISR of the MEI device

 *

 * @irq: The irq number

 * @dev_id: pointer to the device structure

 *

 * returns irqreturn_t

 */

irqreturn_t mei_interrupt_quick_handler(int irq, void *dev_id)

{

	struct mei_device *dev = (struct mei_device *) dev_id;

	u32 csr_reg = mei_hcsr_read(dev);



	if ((csr_reg & H_IS) != H_IS)

		return IRQ_NONE;



	/* clear H_IS bit in H_CSR */

	mei_reg_write(dev, H_CSR, csr_reg);



	return IRQ_WAKE_THREAD;

}



/**

 * mei_hbuf_filled_slots - gets number of device filled buffer slots

 *

drivers/misc/mei/interrupt.c

+1 −23
Original line number Diff line number Diff line
@@ -27,28 +27,6 @@ 
#include "interface.h"





/**

 * mei_interrupt_quick_handler - The ISR of the MEI device

 *

 * @irq: The irq number

 * @dev_id: pointer to the device structure

 *

 * returns irqreturn_t

 */

irqreturn_t mei_interrupt_quick_handler(int irq, void *dev_id)

{

	struct mei_device *dev = (struct mei_device *) dev_id;

	u32 csr_reg = mei_hcsr_read(dev);



	if ((csr_reg & H_IS) != H_IS)

		return IRQ_NONE;



	/* clear H_IS bit in H_CSR */

	mei_reg_write(dev, H_CSR, csr_reg);



	return IRQ_WAKE_THREAD;

}



/**

 * _mei_cmpl - processes completed operation.

 *
@@ -1150,7 +1128,7 @@ irqreturn_t mei_interrupt_thread_handler(int irq, void *dev_id) 
	/* Ack the interrupt here

	 * In case of MSI we don't go through the quick handler */

	if (pci_dev_msi_enabled(dev->pdev))

		mei_reg_write(dev, H_CSR, dev->host_hw_state);

		mei_clear_interrupts(dev);



	dev->me_hw_state = mei_mecsr_read(dev);

drivers/misc/mei/mei_dev.h

+5 −66
Original line number Diff line number Diff line
@@ -440,79 +440,18 @@ int mei_amthif_irq_read(struct mei_device *dev, s32 *slots); 
 * Register Access Function

 */



/**

 * mei_reg_read - Reads 32bit data from the mei device

 *

 * @dev: the device structure

 * @offset: offset from which to read the data

 *

 * returns register value (u32)

 */

static inline u32 mei_reg_read(const struct mei_device *dev,

			       unsigned long offset)

{

	return ioread32(dev->mem_addr + offset);

}



/**

 * mei_reg_write - Writes 32bit data to the mei device

 *

 * @dev: the device structure

 * @offset: offset from which to write the data

 * @value: register value to write (u32)

 */

static inline void mei_reg_write(const struct mei_device *dev,

				 unsigned long offset, u32 value)

{

	iowrite32(value, dev->mem_addr + offset);

}



/**

 * mei_hcsr_read - Reads 32bit data from the host CSR

 *

 * @dev: the device structure

 *

 * returns the byte read.

 */

static inline u32 mei_hcsr_read(const struct mei_device *dev)

{

	return mei_reg_read(dev, H_CSR);

}

u32 mei_hcsr_read(const struct mei_device *dev);

u32 mei_mecsr_read(const struct mei_device *dev);

u32 mei_mecbrw_read(const struct mei_device *dev);



/**

 * mei_mecsr_read - Reads 32bit data from the ME CSR

 *

 * @dev: the device structure

 *

 * returns ME_CSR_HA register value (u32)

 */

static inline u32 mei_mecsr_read(const struct mei_device *dev)

{

	return mei_reg_read(dev, ME_CSR_HA);

}



/**

 * get_me_cb_rw - Reads 32bit data from the mei ME_CB_RW register

 *

 * @dev: the device structure

 *

 * returns ME_CB_RW register value (u32)

 */

static inline u32 mei_mecbrw_read(const struct mei_device *dev)

{

	return mei_reg_read(dev, ME_CB_RW);

}





/*

 * mei interface function prototypes

 */

void mei_hcsr_set(struct mei_device *dev);

void mei_csr_clear_his(struct mei_device *dev);



void mei_clear_interrupts(struct mei_device *dev);

void mei_enable_interrupts(struct mei_device *dev);

void mei_disable_interrupts(struct mei_device *dev);





static inline struct mei_msg_hdr *mei_hbm_hdr(u32 *buf, size_t length)

{

	struct mei_msg_hdr *hdr = (struct mei_msg_hdr *)buf;