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Commit 39b53458 authored Mar 19, 2014 by Russell King

ARM: l2c: realview: improve commentry about the L2 cache requirements

Add better commentry about the L2 cache requirements on these platforms.
Unfortunately, the auxiliary control register is not pre-set to indicate
the correct cache parameters, so we have to manually program these.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

parent 918197be

arch/arm/mach-realview/realview_eb.c

+7 −2

Original line number	Diff line number	Diff line
		@@ -442,8 +442,13 @@ static void __init realview_eb_init(void)
		realview_eb11mp_fixup();

		#ifdef CONFIG_CACHE_L2X0
		/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
		* Bits: .... ...0 0111 1001 0000 .... .... .... */
		/*
		* The PL220 needs to be manually configured as the hardware
		* doesn't report the correct sizes.
		* 1MB (128KB/way), 8-way associativity, event monitor and
		* parity enabled, ignore share bit, no force write allocate
		* Bits: .... ...0 0111 1001 0000 .... .... ....
		*/
		l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
		#endif
		platform_device_register(&pmu_device);

arch/arm/mach-realview/realview_pb1176.c

+7 −1

Original line number	Diff line number	Diff line
		@@ -355,7 +355,13 @@ static void __init realview_pb1176_init(void)
		int i;

		#ifdef CONFIG_CACHE_L2X0
		/* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
		/*
		* The PL220 needs to be manually configured as the hardware
		* doesn't report the correct sizes.
		* 128kB (16kB/way), 8-way associativity, event monitor and
		* parity enabled, ignore share bit, no force write allocate
		* Bits: .... ...0 0111 0011 0000 .... .... ....
		*/
		l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
		#endif

arch/arm/mach-realview/realview_pb11mp.c

+7 −2

Original line number	Diff line number	Diff line
		@@ -337,8 +337,13 @@ static void __init realview_pb11mp_init(void)
		int i;

		#ifdef CONFIG_CACHE_L2X0
		/* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
		* Bits: .... ...0 0111 1001 0000 .... .... .... */
		/*
		* The PL220 needs to be manually configured as the hardware
		* doesn't report the correct sizes.
		* 1MB (128KB/way), 8-way associativity, event monitor and
		* parity enabled, ignore share bit, no force write allocate
		* Bits: .... ...0 0111 1001 0000 .... .... ....
		*/
		l2x0_init(__io_address(REALVIEW_TC11MP_L220_BASE), 0x00790000, 0xfe000fff);
		#endif