Loading qcom/monaco-ion.dtsi +1 −0 Original line number Diff line number Diff line #include <dt-bindings/arm/msm/msm_ion_ids.h> &soc { qcom,ion { compatible = "qcom,msm-ion"; Loading qcom/monaco.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -195,6 +195,30 @@ size = <0 0x800000>; }; qseecom_ta_mem: qseecom_ta_region { compatible = "shared-dma-pool"; alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; reusable; alignment = <0x0 0x400000>; size = <0x0 0x1000000>; }; secure_display_memory: secure_display_region { compatible = "shared-dma-pool"; alloc-ranges = <0 0x00000000 0 0xffffffff>; reusable; alignment = <0 0x400000>; size = <0 0x5c00000>; }; adsp_mem: adsp_region { compatible = "shared-dma-pool"; alloc-ranges = <0 0x00000000 0 0xffffffff>; reusable; alignment = <0 0x400000>; size = <0 0x800000>; }; /* global autoconfigured region for contiguous allocations */ linux,cma { compatible = "shared-dma-pool"; Loading qcom/msm-arm-smmu-monaco.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -39,7 +39,7 @@ /* ALL CBs of GFX: +15 deep PF */ <0x0 0x3ff 0x30B>; gfx_0_tbu: gfx_0_tbu@0x59c5000 { gfx_0_tbu: gfx_0_tbu@0x59dd000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0x59dd000 0x1000>, <0x59da200 0x8>; Loading Loading @@ -141,7 +141,7 @@ /* For nrt TBU +3 deep PF */ <0x800 0x3ff 0x103>; anoc_1_tbu: anoc_1_tbu@0xc785000 { anoc_1_tbu: anoc_1_tbu@0xc7f5000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0xc7f5000 0x1000>, <0xc7f2200 0x8>; Loading @@ -159,7 +159,7 @@ <MASTER_AMPSS_M0 SLAVE_IMEM_CFG 0 1000>; }; mm_rt_tbu: mm_rt_tbu@0xc789000 { mm_rt_tbu: mm_rt_tbu@0xc7f9000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0xc7f9000 0x1000>, <0xc7f2208 0x8>; Loading @@ -177,7 +177,7 @@ <MASTER_MDP_PORT0 SLAVE_SNOC_BIMC_RT 0 1000>; }; mm_nrt_tbu: mm_nrt_tbu@0xc78d000 { mm_nrt_tbu: mm_nrt_tbu@0xc7fd000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0xc7fd000 0x1000>, <0xc7f2210 0x8>; Loading Loading
qcom/monaco-ion.dtsi +1 −0 Original line number Diff line number Diff line #include <dt-bindings/arm/msm/msm_ion_ids.h> &soc { qcom,ion { compatible = "qcom,msm-ion"; Loading
qcom/monaco.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -195,6 +195,30 @@ size = <0 0x800000>; }; qseecom_ta_mem: qseecom_ta_region { compatible = "shared-dma-pool"; alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; reusable; alignment = <0x0 0x400000>; size = <0x0 0x1000000>; }; secure_display_memory: secure_display_region { compatible = "shared-dma-pool"; alloc-ranges = <0 0x00000000 0 0xffffffff>; reusable; alignment = <0 0x400000>; size = <0 0x5c00000>; }; adsp_mem: adsp_region { compatible = "shared-dma-pool"; alloc-ranges = <0 0x00000000 0 0xffffffff>; reusable; alignment = <0 0x400000>; size = <0 0x800000>; }; /* global autoconfigured region for contiguous allocations */ linux,cma { compatible = "shared-dma-pool"; Loading
qcom/msm-arm-smmu-monaco.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -39,7 +39,7 @@ /* ALL CBs of GFX: +15 deep PF */ <0x0 0x3ff 0x30B>; gfx_0_tbu: gfx_0_tbu@0x59c5000 { gfx_0_tbu: gfx_0_tbu@0x59dd000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0x59dd000 0x1000>, <0x59da200 0x8>; Loading Loading @@ -141,7 +141,7 @@ /* For nrt TBU +3 deep PF */ <0x800 0x3ff 0x103>; anoc_1_tbu: anoc_1_tbu@0xc785000 { anoc_1_tbu: anoc_1_tbu@0xc7f5000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0xc7f5000 0x1000>, <0xc7f2200 0x8>; Loading @@ -159,7 +159,7 @@ <MASTER_AMPSS_M0 SLAVE_IMEM_CFG 0 1000>; }; mm_rt_tbu: mm_rt_tbu@0xc789000 { mm_rt_tbu: mm_rt_tbu@0xc7f9000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0xc7f9000 0x1000>, <0xc7f2208 0x8>; Loading @@ -177,7 +177,7 @@ <MASTER_MDP_PORT0 SLAVE_SNOC_BIMC_RT 0 1000>; }; mm_nrt_tbu: mm_nrt_tbu@0xc78d000 { mm_nrt_tbu: mm_nrt_tbu@0xc7fd000 { compatible = "qcom,qsmmuv500-tbu"; reg = <0xc7fd000 0x1000>, <0xc7f2210 0x8>; Loading