Commit 38b65b08 authored May 26, 2017 by Adrian Hunter Committed by Arnaldo Carvalho de Melo Jun 30, 2017

perf intel-pt: Do not use TSC packets for calculating CPU cycles to TSC

CBR (core-to-bus ratio) packets provide an indication of CPU frequency. A
more accurate measure can be made by counting the cycles (given by CYC
packets) in between other timing packets (either MTC or TSC). Using TSC
packets has at least 2 issues: 1) timing might have stopped (e.g. mwait) or
2) TSC packets within PSB+ might slip past CYC packets. For now, simply do
not use TSC packets for calculating CPU cycles to TSC. That leaves the case
where 2 MTC packets are used, otherwise falling back to the CBR value.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Link: http://lkml.kernel.org/r/1495786658-18063-37-git-send-email-adrian.hunter@intel.com

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

parent ead2bfdb

tools/perf/util/intel-pt-decoder/intel-pt-decoder.c

+14 −0

Original line number	Diff line number	Diff line
		@@ -711,6 +711,12 @@ static int intel_pt_calc_cyc_cb(struct intel_pt_pkt_info *pkt_info)
		break;

		case INTEL_PT_TSC:
		/*
		* For now, do not support using TSC packets - refer
		* intel_pt_calc_cyc_to_tsc().
		*/
		if (data->from_mtc)
		return 1;
		timestamp = pkt_info->packet.payload \|
		(data->timestamp & (0xffULL << 56));
		if (data->from_mtc && timestamp < data->timestamp &&
		@@ -828,6 +834,14 @@ static void intel_pt_calc_cyc_to_tsc(struct intel_pt_decoder *decoder,
		.cbr_cyc_to_tsc = 0,
		};

		/*
		* For now, do not support using TSC packets for at least the reasons:
		* 1) timing might have stopped
		* 2) TSC packets within PSB+ can slip against CYC packets
		*/
		if (!from_mtc)
		return;

		intel_pt_pkt_lookahead(decoder, intel_pt_calc_cyc_cb, &data);
		}