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Commit 38290431 authored by Jacopo Mondi's avatar Jacopo Mondi Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: Update 'vsps' properties for readability



Update the 'vsps' property in the R-Car Gen3 SoC device tree files to
match what's in the documentation example.

Signed-off-by: default avatarJacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: default avatarKieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent fe984159
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+1 −1
Original line number Diff line number Diff line
@@ -1811,7 +1811,7 @@
			clocks = <&cpg CPG_MOD 724>,
				 <&cpg CPG_MOD 723>;
			clock-names = "du.0", "du.1";
			vsps = <&vspd0 0 &vspd1 0>;
			vsps = <&vspd0 0>, <&vspd1 0>;
			status = "disabled";

			ports {
+1 −1
Original line number Diff line number Diff line
@@ -3112,7 +3112,7 @@
				 <&cpg CPG_MOD 722>,
				 <&cpg CPG_MOD 721>;
			clock-names = "du.0", "du.1", "du.2", "du.3";
			vsps = <&vspd0 0 &vspd1 0 &vspd2 0 &vspd0 1>;
			vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
			status = "disabled";

			ports {
+1 −1
Original line number Diff line number Diff line
@@ -2469,7 +2469,7 @@
			clock-names = "du.0", "du.1", "du.3";
			status = "disabled";

			vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
			vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;

			ports {
				#address-cells = <1>;
+1 −1
Original line number Diff line number Diff line
@@ -1768,7 +1768,7 @@
			clock-names = "du.0", "du.1";
			resets = <&cpg 724>;
			reset-names = "du.0";
			vsps = <&vspd0 0 &vspd1 0>;
			vsps = <&vspd0 0>, <&vspd1 0>;
			status = "disabled";

			ports {
+1 −1
Original line number Diff line number Diff line
@@ -1003,7 +1003,7 @@
			clock-names = "du.0", "du.1";
			resets = <&cpg 724>;
			reset-names = "du.0";
			vsps = <&vspd0 0 &vspd1 0>;
			vsps = <&vspd0 0>, <&vspd1 0>;
			status = "disabled";

			ports {