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Commit 37f0e311 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'remotes/lorenzo/pci/cadence' 

  - Correct the Cadence cdns_pcie_writel() signature (Alan Douglas)

  - Add Cadence support for optional generic PHYs (Alan Douglas)

  - Add Cadence power management ops (Alan Douglas)

  - Remove redundant variable from Cadence driver (Colin Ian King)

* remotes/lorenzo/pci/cadence:
  PCI: pcie-cadence-ep: Remove redundant variable mmc
  PCI: cadence: Add shutdown callback to host driver
  PCI: cadence: Add Power Management ops for host and EP
  dt-bindings: PCI: cadence: Add DT bindings for optional PHYs
  PCI: cadence: Add generic PHY support to host and EP drivers
  PCI: cadence: Update cdns_pcie_writel() function signature
parents ce342a1a eb1e39f7

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt

+5 −0
Original line number Diff line number Diff line
@@ -9,6 +9,9 @@ Required properties: 


Optional properties:

- max-functions: Maximum number of functions that can be configured (default 1).

- phys: From PHY bindings: List of Generic PHY phandles. One per lane if more

  than one in the list.  If only one PHY listed it must manage all lanes. 

- phy-names:  List of names to identify the PHY.



Example:
@@ -19,4 +22,6 @@ pcie@fc000000 { 
	reg-names = "reg", "mem";

	cdns,max-outbound-regions = <16>;

	max-functions = /bits/ 8 <8>;

	phys = <&ep_phy0 &ep_phy1>;

	phy-names = "pcie-lane0","pcie-lane1";

};

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt

+6 −0
Original line number Diff line number Diff line
@@ -24,6 +24,9 @@ Optional properties: 
  translations (default 32)

- vendor-id: The PCI vendor ID (16 bits, default is design dependent)

- device-id: The PCI device ID (16 bits, default is design dependent)

- phys: From PHY bindings: List of Generic PHY phandles. One per lane if more

  than one in the list.  If only one PHY listed it must manage all lanes. 

- phy-names:  List of names to identify the PHY.



Example:
@@ -57,4 +60,7 @@ pcie@fb000000 { 
	interrupt-map-mask = <0x0 0x0 0x0  0x7>;



	msi-parent = <&its_pci>;



	phys = <&pcie_phy0>;

	phy-names = "pcie-phy";

};

drivers/pci/controller/pcie-cadence-ep.c

+15 −3
Original line number Diff line number Diff line
@@ -238,7 +238,7 @@ static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn) 
	struct cdns_pcie_ep *ep = epc_get_drvdata(epc);

	struct cdns_pcie *pcie = &ep->pcie;

	u32 cap = CDNS_PCIE_EP_FUNC_MSI_CAP_OFFSET;

	u16 flags, mmc, mme;

	u16 flags, mme;



	/* Validate that the MSI feature is actually enabled. */

	flags = cdns_pcie_ep_fn_readw(pcie, fn, cap + PCI_MSI_FLAGS);
@@ -249,7 +249,6 @@ static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn) 
	 * Get the Multiple Message Enable bitfield from the Message Control

	 * register.

	 */

	mmc = (flags & PCI_MSI_FLAGS_QMASK) >> 1;

	mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;



	return mme;
@@ -439,6 +438,7 @@ static int cdns_pcie_ep_probe(struct platform_device *pdev) 
	struct pci_epc *epc;

	struct resource *res;

	int ret;

	int phy_count;



	ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);

	if (!ep)
@@ -473,6 +473,12 @@ static int cdns_pcie_ep_probe(struct platform_device *pdev) 
	if (!ep->ob_addr)

		return -ENOMEM;



	ret = cdns_pcie_init_phy(dev, pcie);

	if (ret) {

		dev_err(dev, "failed to init phy\n");

		return ret;

	}

	platform_set_drvdata(pdev, pcie);

	pm_runtime_enable(dev);

	ret = pm_runtime_get_sync(dev);

	if (ret < 0) {
@@ -521,6 +527,10 @@ static int cdns_pcie_ep_probe(struct platform_device *pdev) 


 err_get_sync:

	pm_runtime_disable(dev);

	cdns_pcie_disable_phy(pcie);

	phy_count = pcie->phy_count;

	while (phy_count--)

		device_link_del(pcie->link[phy_count]);



	return ret;

}
@@ -528,6 +538,7 @@ static int cdns_pcie_ep_probe(struct platform_device *pdev) 
static void cdns_pcie_ep_shutdown(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;

	struct cdns_pcie *pcie = dev_get_drvdata(dev);

	int ret;



	ret = pm_runtime_put_sync(dev);
@@ -536,13 +547,14 @@ static void cdns_pcie_ep_shutdown(struct platform_device *pdev) 


	pm_runtime_disable(dev);



	/* The PCIe controller can't be disabled. */

	cdns_pcie_disable_phy(pcie);

}



static struct platform_driver cdns_pcie_ep_driver = {

	.driver = {

		.name = "cdns-pcie-ep",

		.of_match_table = cdns_pcie_ep_of_match,

		.pm	= &cdns_pcie_pm_ops,

	},

	.probe = cdns_pcie_ep_probe,

	.shutdown = cdns_pcie_ep_shutdown,

drivers/pci/controller/pcie-cadence-host.c

+33 −0
Original line number Diff line number Diff line
@@ -58,6 +58,11 @@ static void __iomem *cdns_pci_map_bus(struct pci_bus *bus, unsigned int devfn, 


		return pcie->reg_base + (where & 0xfff);

	}

	/* Check that the link is up */

	if (!(cdns_pcie_readl(pcie, CDNS_PCIE_LM_BASE) & 0x1))

		return NULL;

	/* Clear AXI link-down status */

	cdns_pcie_writel(pcie, CDNS_PCIE_AT_LINKDOWN, 0x0);



	/* Update Output registers for AXI region 0. */

	addr0 = CDNS_PCIE_AT_OB_REGION_PCI_ADDR0_NBITS(12) |
@@ -239,6 +244,7 @@ static int cdns_pcie_host_probe(struct platform_device *pdev) 
	struct cdns_pcie *pcie;

	struct resource *res;

	int ret;

	int phy_count;



	bridge = devm_pci_alloc_host_bridge(dev, sizeof(*rc));

	if (!bridge)
@@ -290,6 +296,13 @@ static int cdns_pcie_host_probe(struct platform_device *pdev) 
	}

	pcie->mem_res = res;



	ret = cdns_pcie_init_phy(dev, pcie);

	if (ret) {

		dev_err(dev, "failed to init phy\n");

		return ret;

	}

	platform_set_drvdata(pdev, pcie);



	pm_runtime_enable(dev);

	ret = pm_runtime_get_sync(dev);

	if (ret < 0) {
@@ -322,15 +335,35 @@ static int cdns_pcie_host_probe(struct platform_device *pdev) 


 err_get_sync:

	pm_runtime_disable(dev);

	cdns_pcie_disable_phy(pcie);

	phy_count = pcie->phy_count;

	while (phy_count--)

		device_link_del(pcie->link[phy_count]);



	return ret;

}



static void cdns_pcie_shutdown(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;

	struct cdns_pcie *pcie = dev_get_drvdata(dev);

	int ret;



	ret = pm_runtime_put_sync(dev);

	if (ret < 0)

		dev_dbg(dev, "pm_runtime_put_sync failed\n");



	pm_runtime_disable(dev);

	cdns_pcie_disable_phy(pcie);

}



static struct platform_driver cdns_pcie_host_driver = {

	.driver = {

		.name = "cdns-pcie-host",

		.of_match_table = cdns_pcie_host_of_match,

		.pm	= &cdns_pcie_pm_ops,

	},

	.probe = cdns_pcie_host_probe,

	.shutdown = cdns_pcie_shutdown,

};

builtin_platform_driver(cdns_pcie_host_driver);

drivers/pci/controller/pcie-cadence.c

+123 −0
Original line number Diff line number Diff line
@@ -124,3 +124,126 @@ void cdns_pcie_reset_outbound_region(struct cdns_pcie *pcie, u32 r) 
	cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR0(r), 0);

	cdns_pcie_writel(pcie, CDNS_PCIE_AT_OB_REGION_CPU_ADDR1(r), 0);

}



void cdns_pcie_disable_phy(struct cdns_pcie *pcie)

{

	int i = pcie->phy_count;



	while (i--) {

		phy_power_off(pcie->phy[i]);

		phy_exit(pcie->phy[i]);

	}

}



int cdns_pcie_enable_phy(struct cdns_pcie *pcie)

{

	int ret;

	int i;



	for (i = 0; i < pcie->phy_count; i++) {

		ret = phy_init(pcie->phy[i]);

		if (ret < 0)

			goto err_phy;



		ret = phy_power_on(pcie->phy[i]);

		if (ret < 0) {

			phy_exit(pcie->phy[i]);

			goto err_phy;

		}

	}



	return 0;



err_phy:

	while (--i >= 0) {

		phy_power_off(pcie->phy[i]);

		phy_exit(pcie->phy[i]);

	}



	return ret;

}



int cdns_pcie_init_phy(struct device *dev, struct cdns_pcie *pcie)

{

	struct device_node *np = dev->of_node;

	int phy_count;

	struct phy **phy;

	struct device_link **link;

	int i;

	int ret;

	const char *name;



	phy_count = of_property_count_strings(np, "phy-names");

	if (phy_count < 1) {

		dev_err(dev, "no phy-names.  PHY will not be initialized\n");

		pcie->phy_count = 0;

		return 0;

	}



	phy = devm_kzalloc(dev, sizeof(*phy) * phy_count, GFP_KERNEL);

	if (!phy)

		return -ENOMEM;



	link = devm_kzalloc(dev, sizeof(*link) * phy_count, GFP_KERNEL);

	if (!link)

		return -ENOMEM;



	for (i = 0; i < phy_count; i++) {

		of_property_read_string_index(np, "phy-names", i, &name);

		phy[i] = devm_phy_optional_get(dev, name);

		if (IS_ERR(phy))

			return PTR_ERR(phy);



		link[i] = device_link_add(dev, &phy[i]->dev, DL_FLAG_STATELESS);

		if (!link[i]) {

			ret = -EINVAL;

			goto err_link;

		}

	}



	pcie->phy_count = phy_count;

	pcie->phy = phy;

	pcie->link = link;



	ret =  cdns_pcie_enable_phy(pcie);

	if (ret)

		goto err_link;



	return 0;



err_link:

	while (--i >= 0)

		device_link_del(link[i]);



	return ret;

}



#ifdef CONFIG_PM_SLEEP

static int cdns_pcie_suspend_noirq(struct device *dev)

{

	struct cdns_pcie *pcie = dev_get_drvdata(dev);



	cdns_pcie_disable_phy(pcie);



	return 0;

}



static int cdns_pcie_resume_noirq(struct device *dev)

{

	struct cdns_pcie *pcie = dev_get_drvdata(dev);

	int ret;



	ret = cdns_pcie_enable_phy(pcie);

	if (ret) {

		dev_err(dev, "failed to enable phy\n");

		return ret;

	}



	return 0;

}

#endif



const struct dev_pm_ops cdns_pcie_pm_ops = {

	SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(cdns_pcie_suspend_noirq,

				      cdns_pcie_resume_noirq)

};