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Commit 37dc9cdb authored by Jian Shen's avatar Jian Shen Committed by David S. Miller
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net: hns3: Fix cmdq registers initialization issue for vf 



According to hardware's description, the head pointer register should
be written before the tail pointer register while initializing the vf
command queue. Otherwise, it may trigger an interrupt even though there
is no command received.

Fixes: fedd0c15 ("net: hns3: Add HNS3 VF IMP(Integrated Management Proc) cmd interface")
Signed-off-by: default avatarJian Shen <shenjian15@huawei.com>
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarSalil Mehta <salil.mehta@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent fd813314

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.c

+2 −2
Original line number Diff line number Diff line
@@ -132,8 +132,8 @@ static int hclgevf_init_cmd_queue(struct hclgevf_dev *hdev, 
		reg_val |= HCLGEVF_NIC_CMQ_ENABLE;

		hclgevf_write_dev(hw, HCLGEVF_NIC_CSQ_DEPTH_REG, reg_val);



		hclgevf_write_dev(hw, HCLGEVF_NIC_CSQ_TAIL_REG, 0);

		hclgevf_write_dev(hw, HCLGEVF_NIC_CSQ_HEAD_REG, 0);

		hclgevf_write_dev(hw, HCLGEVF_NIC_CSQ_TAIL_REG, 0);

		break;

	case HCLGEVF_TYPE_CRQ:

		reg_val = (u32)ring->desc_dma_addr;
@@ -145,8 +145,8 @@ static int hclgevf_init_cmd_queue(struct hclgevf_dev *hdev, 
		reg_val |= HCLGEVF_NIC_CMQ_ENABLE;

		hclgevf_write_dev(hw, HCLGEVF_NIC_CRQ_DEPTH_REG, reg_val);



		hclgevf_write_dev(hw, HCLGEVF_NIC_CRQ_TAIL_REG, 0);

		hclgevf_write_dev(hw, HCLGEVF_NIC_CRQ_HEAD_REG, 0);

		hclgevf_write_dev(hw, HCLGEVF_NIC_CRQ_TAIL_REG, 0);

		break;

	}