Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 36b50572 authored by Noralf Trønnes's avatar Noralf Trønnes
Browse files

drm/tinydrm: Rename variable mipi -> dbi 



struct mipi_dbi is going to be split into an interface part and a display
pipeline part. The interface part can be used by drivers that need to
initialize the controller, but that won't upload the framebuffer over
this interface.

tinydrm uses the variable name 'mipi' but this is not a good name since
MIPI refers to a lot of standards. This patch changes the variable name
to 'dbi' where it refers to the interface part of struct mipi_dbi.

Functions that use both future parts will have both variables temporarily
pointing to the same structure.

Cc: Eric Anholt <eric@anholt.net>
Cc: David Lechner <david@lechnology.com>
Reviewed-by: default avatarSam Ravnborg <sam@ravnborg.org>
Signed-off-by: default avatarNoralf Trønnes <noralf@tronnes.org>
Acked-by: default avatarDavid Lechner <david@lechnology.com>
Acked-by: default avatarEric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20190722104312.16184-3-noralf@tronnes.org
parent 771ea160

drivers/gpu/drm/tinydrm/hx8357d.c

+16 −15
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
			     struct drm_plane_state *plane_state)

{

	struct mipi_dbi *mipi = drm_to_mipi_dbi(pipe->crtc.dev);

	struct mipi_dbi *dbi = mipi;

	u8 addr_mode;

	int ret, idx;
@@ -63,22 +64,22 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
		goto out_enable;



	/* setextc */

	mipi_dbi_command(mipi, HX8357D_SETEXTC, 0xFF, 0x83, 0x57);

	mipi_dbi_command(dbi, HX8357D_SETEXTC, 0xFF, 0x83, 0x57);

	msleep(150);



	/* setRGB which also enables SDO */

	mipi_dbi_command(mipi, HX8357D_SETRGB, 0x00, 0x00, 0x06, 0x06);

	mipi_dbi_command(dbi, HX8357D_SETRGB, 0x00, 0x00, 0x06, 0x06);



	/* -1.52V */

	mipi_dbi_command(mipi, HX8357D_SETCOM, 0x25);

	mipi_dbi_command(dbi, HX8357D_SETCOM, 0x25);



	/* Normal mode 70Hz, Idle mode 55 Hz */

	mipi_dbi_command(mipi, HX8357D_SETOSC, 0x68);

	mipi_dbi_command(dbi, HX8357D_SETOSC, 0x68);



	/* Set Panel - BGR, Gate direction swapped */

	mipi_dbi_command(mipi, HX8357D_SETPANEL, 0x05);

	mipi_dbi_command(dbi, HX8357D_SETPANEL, 0x05);



	mipi_dbi_command(mipi, HX8357D_SETPOWER,

	mipi_dbi_command(dbi, HX8357D_SETPOWER,

			 0x00,  /* Not deep standby */

			 0x15,  /* BT */

			 0x1C,  /* VSPR */
@@ -86,7 +87,7 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
			 0x83,  /* AP */

			 0xAA);  /* FS */



	mipi_dbi_command(mipi, HX8357D_SETSTBA,

	mipi_dbi_command(dbi, HX8357D_SETSTBA,

			 0x50,  /* OPON normal */

			 0x50,  /* OPON idle */

			 0x01,  /* STBA */
@@ -94,7 +95,7 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
			 0x1E,  /* STBA */

			 0x08);  /* GEN */



	mipi_dbi_command(mipi, HX8357D_SETCYC,

	mipi_dbi_command(dbi, HX8357D_SETCYC,

			 0x02,  /* NW 0x02 */

			 0x40,  /* RTN */

			 0x00,  /* DIV */
@@ -103,7 +104,7 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
			 0x0D,  /* GDON */

			 0x78);  /* GDOFF */



	mipi_dbi_command(mipi, HX8357D_SETGAMMA,

	mipi_dbi_command(dbi, HX8357D_SETGAMMA,

			 0x02,

			 0x0A,

			 0x11,
@@ -140,21 +141,21 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
			 0x01);



	/* 16 bit */

	mipi_dbi_command(mipi, MIPI_DCS_SET_PIXEL_FORMAT,

	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT,

			 MIPI_DCS_PIXEL_FMT_16BIT);



	/* TE off */

	mipi_dbi_command(mipi, MIPI_DCS_SET_TEAR_ON, 0x00);

	mipi_dbi_command(dbi, MIPI_DCS_SET_TEAR_ON, 0x00);



	/* tear line */

	mipi_dbi_command(mipi, MIPI_DCS_SET_TEAR_SCANLINE, 0x00, 0x02);

	mipi_dbi_command(dbi, MIPI_DCS_SET_TEAR_SCANLINE, 0x00, 0x02);



	/* Exit Sleep */

	mipi_dbi_command(mipi, MIPI_DCS_EXIT_SLEEP_MODE);

	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);

	msleep(150);



	/* display on */

	mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_ON);

	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);

	usleep_range(5000, 7000);



out_enable:
@@ -172,7 +173,7 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
		addr_mode = HX8357D_MADCTL_MV | HX8357D_MADCTL_MX;

		break;

	}

	mipi_dbi_command(mipi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);

	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);

	mipi_dbi_enable_flush(mipi, crtc_state, plane_state);

out_exit:

	drm_dev_exit(idx);

drivers/gpu/drm/tinydrm/ili9225.c

+73 −68
Original line number Diff line number Diff line
@@ -68,11 +68,11 @@ 
#define ILI9225_GAMMA_CONTROL_9		0x58

#define ILI9225_GAMMA_CONTROL_10	0x59



static inline int ili9225_command(struct mipi_dbi *mipi, u8 cmd, u16 data)

static inline int ili9225_command(struct mipi_dbi *dbi, u8 cmd, u16 data)

{

	u8 par[2] = { data >> 8, data & 0xff };



	return mipi_dbi_command_buf(mipi, cmd, par, 2);

	return mipi_dbi_command_buf(dbi, cmd, par, 2);

}



static void ili9225_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect)
@@ -81,7 +81,8 @@ static void ili9225_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect) 
	struct mipi_dbi *mipi = drm_to_mipi_dbi(fb->dev);

	unsigned int height = rect->y2 - rect->y1;

	unsigned int width = rect->x2 - rect->x1;

	bool swap = mipi->swap_bytes;

	struct mipi_dbi *dbi = mipi;

	bool swap = dbi->swap_bytes;

	u16 x_start, y_start;

	u16 x1, x2, y1, y2;

	int idx, ret = 0;
@@ -98,7 +99,7 @@ static void ili9225_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect) 


	DRM_DEBUG_KMS("Flushing [FB:%d] " DRM_RECT_FMT "\n", fb->base.id, DRM_RECT_ARG(rect));



	if (!mipi->dc || !full || swap ||

	if (!dbi->dc || !full || swap ||

	    fb->format->format == DRM_FORMAT_XRGB8888) {

		tr = mipi->tx_buf;

		ret = mipi_dbi_buf_copy(mipi->tx_buf, fb, rect, swap);
@@ -143,15 +144,15 @@ static void ili9225_fb_dirty(struct drm_framebuffer *fb, struct drm_rect *rect) 
		break;

	}



	ili9225_command(mipi, ILI9225_HORIZ_WINDOW_ADDR_1, x2);

	ili9225_command(mipi, ILI9225_HORIZ_WINDOW_ADDR_2, x1);

	ili9225_command(mipi, ILI9225_VERT_WINDOW_ADDR_1, y2);

	ili9225_command(mipi, ILI9225_VERT_WINDOW_ADDR_2, y1);

	ili9225_command(dbi, ILI9225_HORIZ_WINDOW_ADDR_1, x2);

	ili9225_command(dbi, ILI9225_HORIZ_WINDOW_ADDR_2, x1);

	ili9225_command(dbi, ILI9225_VERT_WINDOW_ADDR_1, y2);

	ili9225_command(dbi, ILI9225_VERT_WINDOW_ADDR_2, y1);



	ili9225_command(mipi, ILI9225_RAM_ADDRESS_SET_1, x_start);

	ili9225_command(mipi, ILI9225_RAM_ADDRESS_SET_2, y_start);

	ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_1, x_start);

	ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_2, y_start);



	ret = mipi_dbi_command_buf(mipi, ILI9225_WRITE_DATA_TO_GRAM, tr,

	ret = mipi_dbi_command_buf(dbi, ILI9225_WRITE_DATA_TO_GRAM, tr,

				   width * height * 2);

err_msg:

	if (ret)
@@ -185,6 +186,7 @@ static void ili9225_pipe_enable(struct drm_simple_display_pipe *pipe, 
	struct mipi_dbi *mipi = drm_to_mipi_dbi(pipe->crtc.dev);

	struct drm_framebuffer *fb = plane_state->fb;

	struct device *dev = pipe->crtc.dev->dev;

	struct mipi_dbi *dbi = mipi;

	struct drm_rect rect = {

		.x1 = 0,

		.x2 = fb->width,
@@ -199,7 +201,7 @@ static void ili9225_pipe_enable(struct drm_simple_display_pipe *pipe, 


	DRM_DEBUG_KMS("\n");



	mipi_dbi_hw_reset(mipi);

	mipi_dbi_hw_reset(dbi);



	/*

	 * There don't seem to be two example init sequences that match, so
@@ -207,27 +209,27 @@ static void ili9225_pipe_enable(struct drm_simple_display_pipe *pipe, 
	 * https://github.com/Nkawu/TFT_22_ILI9225/blob/master/src/TFT_22_ILI9225.cpp

	 */



	ret = ili9225_command(mipi, ILI9225_POWER_CONTROL_1, 0x0000);

	ret = ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0000);

	if (ret) {

		DRM_DEV_ERROR(dev, "Error sending command %d\n", ret);

		goto out_exit;

	}

	ili9225_command(mipi, ILI9225_POWER_CONTROL_2, 0x0000);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_3, 0x0000);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_4, 0x0000);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_5, 0x0000);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0000);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_3, 0x0000);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_4, 0x0000);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_5, 0x0000);



	msleep(40);



	ili9225_command(mipi, ILI9225_POWER_CONTROL_2, 0x0018);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_3, 0x6121);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_4, 0x006f);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_5, 0x495f);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_1, 0x0800);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0018);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_3, 0x6121);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_4, 0x006f);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_5, 0x495f);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0800);



	msleep(10);



	ili9225_command(mipi, ILI9225_POWER_CONTROL_2, 0x103b);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x103b);



	msleep(50);
@@ -245,41 +247,41 @@ static void ili9225_pipe_enable(struct drm_simple_display_pipe *pipe, 
		am_id = 0x28;

		break;

	}

	ili9225_command(mipi, ILI9225_DRIVER_OUTPUT_CONTROL, 0x011c);

	ili9225_command(mipi, ILI9225_LCD_AC_DRIVING_CONTROL, 0x0100);

	ili9225_command(mipi, ILI9225_ENTRY_MODE, 0x1000 | am_id);

	ili9225_command(mipi, ILI9225_DISPLAY_CONTROL_1, 0x0000);

	ili9225_command(mipi, ILI9225_BLANK_PERIOD_CONTROL_1, 0x0808);

	ili9225_command(mipi, ILI9225_FRAME_CYCLE_CONTROL, 0x1100);

	ili9225_command(mipi, ILI9225_INTERFACE_CONTROL, 0x0000);

	ili9225_command(mipi, ILI9225_OSCILLATION_CONTROL, 0x0d01);

	ili9225_command(mipi, ILI9225_VCI_RECYCLING, 0x0020);

	ili9225_command(mipi, ILI9225_RAM_ADDRESS_SET_1, 0x0000);

	ili9225_command(mipi, ILI9225_RAM_ADDRESS_SET_2, 0x0000);



	ili9225_command(mipi, ILI9225_GATE_SCAN_CONTROL, 0x0000);

	ili9225_command(mipi, ILI9225_VERTICAL_SCROLL_1, 0x00db);

	ili9225_command(mipi, ILI9225_VERTICAL_SCROLL_2, 0x0000);

	ili9225_command(mipi, ILI9225_VERTICAL_SCROLL_3, 0x0000);

	ili9225_command(mipi, ILI9225_PARTIAL_DRIVING_POS_1, 0x00db);

	ili9225_command(mipi, ILI9225_PARTIAL_DRIVING_POS_2, 0x0000);



	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_1, 0x0000);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_2, 0x0808);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_3, 0x080a);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_4, 0x000a);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_5, 0x0a08);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_6, 0x0808);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_7, 0x0000);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_8, 0x0a00);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_9, 0x0710);

	ili9225_command(mipi, ILI9225_GAMMA_CONTROL_10, 0x0710);



	ili9225_command(mipi, ILI9225_DISPLAY_CONTROL_1, 0x0012);

	ili9225_command(dbi, ILI9225_DRIVER_OUTPUT_CONTROL, 0x011c);

	ili9225_command(dbi, ILI9225_LCD_AC_DRIVING_CONTROL, 0x0100);

	ili9225_command(dbi, ILI9225_ENTRY_MODE, 0x1000 | am_id);

	ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0000);

	ili9225_command(dbi, ILI9225_BLANK_PERIOD_CONTROL_1, 0x0808);

	ili9225_command(dbi, ILI9225_FRAME_CYCLE_CONTROL, 0x1100);

	ili9225_command(dbi, ILI9225_INTERFACE_CONTROL, 0x0000);

	ili9225_command(dbi, ILI9225_OSCILLATION_CONTROL, 0x0d01);

	ili9225_command(dbi, ILI9225_VCI_RECYCLING, 0x0020);

	ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_1, 0x0000);

	ili9225_command(dbi, ILI9225_RAM_ADDRESS_SET_2, 0x0000);



	ili9225_command(dbi, ILI9225_GATE_SCAN_CONTROL, 0x0000);

	ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_1, 0x00db);

	ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_2, 0x0000);

	ili9225_command(dbi, ILI9225_VERTICAL_SCROLL_3, 0x0000);

	ili9225_command(dbi, ILI9225_PARTIAL_DRIVING_POS_1, 0x00db);

	ili9225_command(dbi, ILI9225_PARTIAL_DRIVING_POS_2, 0x0000);



	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_1, 0x0000);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_2, 0x0808);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_3, 0x080a);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_4, 0x000a);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_5, 0x0a08);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_6, 0x0808);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_7, 0x0000);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_8, 0x0a00);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_9, 0x0710);

	ili9225_command(dbi, ILI9225_GAMMA_CONTROL_10, 0x0710);



	ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0012);



	msleep(50);



	ili9225_command(mipi, ILI9225_DISPLAY_CONTROL_1, 0x1017);

	ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x1017);



	mipi->enabled = true;

	ili9225_fb_dirty(fb, &rect);
@@ -290,6 +292,7 @@ static void ili9225_pipe_enable(struct drm_simple_display_pipe *pipe, 
static void ili9225_pipe_disable(struct drm_simple_display_pipe *pipe)

{

	struct mipi_dbi *mipi = drm_to_mipi_dbi(pipe->crtc.dev);

	struct mipi_dbi *dbi = mipi;



	DRM_DEBUG_KMS("\n");
@@ -303,33 +306,33 @@ static void ili9225_pipe_disable(struct drm_simple_display_pipe *pipe) 
	if (!mipi->enabled)

		return;



	ili9225_command(mipi, ILI9225_DISPLAY_CONTROL_1, 0x0000);

	ili9225_command(dbi, ILI9225_DISPLAY_CONTROL_1, 0x0000);

	msleep(50);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_2, 0x0007);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_2, 0x0007);

	msleep(50);

	ili9225_command(mipi, ILI9225_POWER_CONTROL_1, 0x0a02);

	ili9225_command(dbi, ILI9225_POWER_CONTROL_1, 0x0a02);



	mipi->enabled = false;

}



static int ili9225_dbi_command(struct mipi_dbi *mipi, u8 *cmd, u8 *par,

static int ili9225_dbi_command(struct mipi_dbi *dbi, u8 *cmd, u8 *par,

			       size_t num)

{

	struct spi_device *spi = mipi->spi;

	struct spi_device *spi = dbi->spi;

	unsigned int bpw = 8;

	u32 speed_hz;

	int ret;



	gpiod_set_value_cansleep(mipi->dc, 0);

	gpiod_set_value_cansleep(dbi->dc, 0);

	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, 1);

	ret = mipi_dbi_spi_transfer(spi, speed_hz, 8, cmd, 1);

	if (ret || !num)

		return ret;



	if (*cmd == ILI9225_WRITE_DATA_TO_GRAM && !mipi->swap_bytes)

	if (*cmd == ILI9225_WRITE_DATA_TO_GRAM && !dbi->swap_bytes)

		bpw = 16;



	gpiod_set_value_cansleep(mipi->dc, 1);

	gpiod_set_value_cansleep(dbi->dc, 1);

	speed_hz = mipi_dbi_spi_cmd_max_speed(spi, num);



	return mipi_dbi_spi_transfer(spi, speed_hz, bpw, par, num);
@@ -377,6 +380,7 @@ static int ili9225_probe(struct spi_device *spi) 
	struct device *dev = &spi->dev;

	struct drm_device *drm;

	struct mipi_dbi *mipi;

	struct mipi_dbi *dbi;

	struct gpio_desc *rs;

	u32 rotation = 0;

	int ret;
@@ -385,6 +389,7 @@ static int ili9225_probe(struct spi_device *spi) 
	if (!mipi)

		return -ENOMEM;



	dbi = mipi;

	drm = &mipi->drm;

	ret = devm_drm_dev_init(dev, drm, &ili9225_driver);

	if (ret) {
@@ -394,10 +399,10 @@ static int ili9225_probe(struct spi_device *spi) 


	drm_mode_config_init(drm);



	mipi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);

	if (IS_ERR(mipi->reset)) {

	dbi->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);

	if (IS_ERR(dbi->reset)) {

		DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");

		return PTR_ERR(mipi->reset);

		return PTR_ERR(dbi->reset);

	}



	rs = devm_gpiod_get(dev, "rs", GPIOD_OUT_LOW);
@@ -408,12 +413,12 @@ static int ili9225_probe(struct spi_device *spi) 


	device_property_read_u32(dev, "rotation", &rotation);



	ret = mipi_dbi_spi_init(spi, mipi, rs);

	ret = mipi_dbi_spi_init(spi, dbi, rs);

	if (ret)

		return ret;



	/* override the command function set in  mipi_dbi_spi_init() */

	mipi->command = ili9225_dbi_command;

	dbi->command = ili9225_dbi_command;



	ret = mipi_dbi_init(mipi, &ili9225_pipe_funcs, &ili9225_mode, rotation);

	if (ret)

drivers/gpu/drm/tinydrm/ili9341.c

+29 −26
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
			     struct drm_plane_state *plane_state)

{

	struct mipi_dbi *mipi = drm_to_mipi_dbi(pipe->crtc.dev);

	struct mipi_dbi *dbi = mipi;

	u8 addr_mode;

	int ret, idx;
@@ -68,47 +69,47 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
	if (ret == 1)

		goto out_enable;



	mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_OFF);

	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);



	mipi_dbi_command(mipi, ILI9341_PWCTRLB, 0x00, 0xc1, 0x30);

	mipi_dbi_command(mipi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);

	mipi_dbi_command(mipi, ILI9341_DTCTRLA, 0x85, 0x00, 0x78);

	mipi_dbi_command(mipi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);

	mipi_dbi_command(mipi, ILI9341_PUMPCTRL, 0x20);

	mipi_dbi_command(mipi, ILI9341_DTCTRLB, 0x00, 0x00);

	mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0xc1, 0x30);

	mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);

	mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x00, 0x78);

	mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);

	mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20);

	mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00);



	/* Power Control */

	mipi_dbi_command(mipi, ILI9341_PWCTRL1, 0x23);

	mipi_dbi_command(mipi, ILI9341_PWCTRL2, 0x10);

	mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x23);

	mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x10);

	/* VCOM */

	mipi_dbi_command(mipi, ILI9341_VMCTRL1, 0x3e, 0x28);

	mipi_dbi_command(mipi, ILI9341_VMCTRL2, 0x86);

	mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x3e, 0x28);

	mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0x86);



	/* Memory Access Control */

	mipi_dbi_command(mipi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);

	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);



	/* Frame Rate */

	mipi_dbi_command(mipi, ILI9341_FRMCTR1, 0x00, 0x1b);

	mipi_dbi_command(dbi, ILI9341_FRMCTR1, 0x00, 0x1b);



	/* Gamma */

	mipi_dbi_command(mipi, ILI9341_EN3GAM, 0x00);

	mipi_dbi_command(mipi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);

	mipi_dbi_command(mipi, ILI9341_PGAMCTRL,

	mipi_dbi_command(dbi, ILI9341_EN3GAM, 0x00);

	mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);

	mipi_dbi_command(dbi, ILI9341_PGAMCTRL,

			 0x0f, 0x31, 0x2b, 0x0c, 0x0e, 0x08, 0x4e, 0xf1,

			 0x37, 0x07, 0x10, 0x03, 0x0e, 0x09, 0x00);

	mipi_dbi_command(mipi, ILI9341_NGAMCTRL,

	mipi_dbi_command(dbi, ILI9341_NGAMCTRL,

			 0x00, 0x0e, 0x14, 0x03, 0x11, 0x07, 0x31, 0xc1,

			 0x48, 0x08, 0x0f, 0x0c, 0x31, 0x36, 0x0f);



	/* DDRAM */

	mipi_dbi_command(mipi, ILI9341_ETMOD, 0x07);

	mipi_dbi_command(dbi, ILI9341_ETMOD, 0x07);



	/* Display */

	mipi_dbi_command(mipi, ILI9341_DISCTRL, 0x08, 0x82, 0x27, 0x00);

	mipi_dbi_command(mipi, MIPI_DCS_EXIT_SLEEP_MODE);

	mipi_dbi_command(dbi, ILI9341_DISCTRL, 0x08, 0x82, 0x27, 0x00);

	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);

	msleep(100);



	mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_ON);

	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);

	msleep(100);



out_enable:
@@ -128,7 +129,7 @@ static void yx240qv29_enable(struct drm_simple_display_pipe *pipe, 
		break;

	}

	addr_mode |= ILI9341_MADCTL_BGR;

	mipi_dbi_command(mipi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);

	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);

	mipi_dbi_enable_flush(mipi, crtc_state, plane_state);

out_exit:

	drm_dev_exit(idx);
@@ -177,6 +178,7 @@ static int ili9341_probe(struct spi_device *spi) 
	struct device *dev = &spi->dev;

	struct drm_device *drm;

	struct mipi_dbi *mipi;

	struct mipi_dbi *dbi;

	struct gpio_desc *dc;

	u32 rotation = 0;

	int ret;
@@ -185,6 +187,7 @@ static int ili9341_probe(struct spi_device *spi) 
	if (!mipi)

		return -ENOMEM;



	dbi = mipi;

	drm = &mipi->drm;

	ret = devm_drm_dev_init(dev, drm, &ili9341_driver);

	if (ret) {
@@ -194,10 +197,10 @@ static int ili9341_probe(struct spi_device *spi) 


	drm_mode_config_init(drm);



	mipi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);

	if (IS_ERR(mipi->reset)) {

	dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);

	if (IS_ERR(dbi->reset)) {

		DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");

		return PTR_ERR(mipi->reset);

		return PTR_ERR(dbi->reset);

	}



	dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
@@ -212,7 +215,7 @@ static int ili9341_probe(struct spi_device *spi) 


	device_property_read_u32(dev, "rotation", &rotation);



	ret = mipi_dbi_spi_init(spi, mipi, dc);

	ret = mipi_dbi_spi_init(spi, dbi, dc);

	if (ret)

		return ret;

drivers/gpu/drm/tinydrm/mi0283qt.c

+29 −26
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ static void mi0283qt_enable(struct drm_simple_display_pipe *pipe, 
			    struct drm_plane_state *plane_state)

{

	struct mipi_dbi *mipi = drm_to_mipi_dbi(pipe->crtc.dev);

	struct mipi_dbi *dbi = mipi;

	u8 addr_mode;

	int ret, idx;
@@ -66,47 +67,47 @@ static void mi0283qt_enable(struct drm_simple_display_pipe *pipe, 
	if (ret == 1)

		goto out_enable;



	mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_OFF);

	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);



	mipi_dbi_command(mipi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30);

	mipi_dbi_command(mipi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);

	mipi_dbi_command(mipi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79);

	mipi_dbi_command(mipi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);

	mipi_dbi_command(mipi, ILI9341_PUMPCTRL, 0x20);

	mipi_dbi_command(mipi, ILI9341_DTCTRLB, 0x00, 0x00);

	mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30);

	mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);

	mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79);

	mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);

	mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20);

	mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00);



	/* Power Control */

	mipi_dbi_command(mipi, ILI9341_PWCTRL1, 0x26);

	mipi_dbi_command(mipi, ILI9341_PWCTRL2, 0x11);

	mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x26);

	mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x11);

	/* VCOM */

	mipi_dbi_command(mipi, ILI9341_VMCTRL1, 0x35, 0x3e);

	mipi_dbi_command(mipi, ILI9341_VMCTRL2, 0xbe);

	mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x35, 0x3e);

	mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0xbe);



	/* Memory Access Control */

	mipi_dbi_command(mipi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);

	mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);



	/* Frame Rate */

	mipi_dbi_command(mipi, ILI9341_FRMCTR1, 0x00, 0x1b);

	mipi_dbi_command(dbi, ILI9341_FRMCTR1, 0x00, 0x1b);



	/* Gamma */

	mipi_dbi_command(mipi, ILI9341_EN3GAM, 0x08);

	mipi_dbi_command(mipi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);

	mipi_dbi_command(mipi, ILI9341_PGAMCTRL,

	mipi_dbi_command(dbi, ILI9341_EN3GAM, 0x08);

	mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);

	mipi_dbi_command(dbi, ILI9341_PGAMCTRL,

		       0x1f, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,

		       0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00);

	mipi_dbi_command(mipi, ILI9341_NGAMCTRL,

	mipi_dbi_command(dbi, ILI9341_NGAMCTRL,

		       0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,

		       0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f);



	/* DDRAM */

	mipi_dbi_command(mipi, ILI9341_ETMOD, 0x07);

	mipi_dbi_command(dbi, ILI9341_ETMOD, 0x07);



	/* Display */

	mipi_dbi_command(mipi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00);

	mipi_dbi_command(mipi, MIPI_DCS_EXIT_SLEEP_MODE);

	mipi_dbi_command(dbi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00);

	mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);

	msleep(100);



	mipi_dbi_command(mipi, MIPI_DCS_SET_DISPLAY_ON);

	mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);

	msleep(100);



out_enable:
@@ -132,7 +133,7 @@ static void mi0283qt_enable(struct drm_simple_display_pipe *pipe, 
		break;

	}

	addr_mode |= ILI9341_MADCTL_BGR;

	mipi_dbi_command(mipi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);

	mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);

	mipi_dbi_enable_flush(mipi, crtc_state, plane_state);

out_exit:

	drm_dev_exit(idx);
@@ -181,6 +182,7 @@ static int mi0283qt_probe(struct spi_device *spi) 
	struct device *dev = &spi->dev;

	struct drm_device *drm;

	struct mipi_dbi *mipi;

	struct mipi_dbi *dbi;

	struct gpio_desc *dc;

	u32 rotation = 0;

	int ret;
@@ -189,6 +191,7 @@ static int mi0283qt_probe(struct spi_device *spi) 
	if (!mipi)

		return -ENOMEM;



	dbi = mipi;

	drm = &mipi->drm;

	ret = devm_drm_dev_init(dev, drm, &mi0283qt_driver);

	if (ret) {
@@ -198,10 +201,10 @@ static int mi0283qt_probe(struct spi_device *spi) 


	drm_mode_config_init(drm);



	mipi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);

	if (IS_ERR(mipi->reset)) {

	dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);

	if (IS_ERR(dbi->reset)) {

		DRM_DEV_ERROR(dev, "Failed to get gpio 'reset'\n");

		return PTR_ERR(mipi->reset);

		return PTR_ERR(dbi->reset);

	}



	dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
@@ -220,7 +223,7 @@ static int mi0283qt_probe(struct spi_device *spi) 


	device_property_read_u32(dev, "rotation", &rotation);



	ret = mipi_dbi_spi_init(spi, mipi, dc);

	ret = mipi_dbi_spi_init(spi, dbi, dc);

	if (ret)

		return ret;

drivers/gpu/drm/tinydrm/mipi-dbi.c

+78 −75

File changed.

Preview size limit exceeded, changes collapsed.