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Commit 369a094d authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'hns-fixes' 



Peng Li says:

====================
net: hns: Code improvements & fixes for HNS driver

This patchset introduces some code improvements and fixes
for the identified problems in the HNS driver.

Every patch is independent.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 8203e2d8 6adafc35

drivers/net/ethernet/hisilicon/hns/hns_ae_adapt.c

+3 −0
Original line number Diff line number Diff line
@@ -379,6 +379,9 @@ static void hns_ae_stop(struct hnae_handle *handle) 


	hns_ae_ring_enable_all(handle, 0);



	/* clean rx fbd. */

	hns_rcb_wait_fbd_clean(handle->qs, handle->q_num, RCB_INT_FLAG_RX);



	(void)hns_mac_vm_config_bc_en(mac_cb, 0, false);

}

drivers/net/ethernet/hisilicon/hns/hns_dsaf_gmac.c

+10 −4
Original line number Diff line number Diff line
@@ -67,24 +67,30 @@ static void hns_gmac_enable(void *mac_drv, enum mac_commom_mode mode) 
	struct mac_driver *drv = (struct mac_driver *)mac_drv;



	/*enable GE rX/tX */

	if ((mode == MAC_COMM_MODE_TX) || (mode == MAC_COMM_MODE_RX_AND_TX))

	if (mode == MAC_COMM_MODE_TX || mode == MAC_COMM_MODE_RX_AND_TX)

		dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 1);



	if ((mode == MAC_COMM_MODE_RX) || (mode == MAC_COMM_MODE_RX_AND_TX))

	if (mode == MAC_COMM_MODE_RX || mode == MAC_COMM_MODE_RX_AND_TX) {

		/* enable rx pcs */

		dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 0);

		dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 1);

	}

}



static void hns_gmac_disable(void *mac_drv, enum mac_commom_mode mode)

{

	struct mac_driver *drv = (struct mac_driver *)mac_drv;



	/*disable GE rX/tX */

	if ((mode == MAC_COMM_MODE_TX) || (mode == MAC_COMM_MODE_RX_AND_TX))

	if (mode == MAC_COMM_MODE_TX || mode == MAC_COMM_MODE_RX_AND_TX)

		dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_TX_EN_B, 0);



	if ((mode == MAC_COMM_MODE_RX) || (mode == MAC_COMM_MODE_RX_AND_TX))

	if (mode == MAC_COMM_MODE_RX || mode == MAC_COMM_MODE_RX_AND_TX) {

		/* disable rx pcs */

		dsaf_set_dev_bit(drv, GMAC_PCS_RX_EN_REG, 0, 1);

		dsaf_set_dev_bit(drv, GMAC_PORT_EN_REG, GMAC_PORT_RX_EN_B, 0);

	}

}



/* hns_gmac_get_en - get port enable

 * @mac_drv:mac device

drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c

+15 −0
Original line number Diff line number Diff line
@@ -778,6 +778,17 @@ static int hns_mac_register_phy(struct hns_mac_cb *mac_cb) 
	return rc;

}



static void hns_mac_remove_phydev(struct hns_mac_cb *mac_cb)

{

	if (!to_acpi_device_node(mac_cb->fw_port) || !mac_cb->phy_dev)

		return;



	phy_device_remove(mac_cb->phy_dev);

	phy_device_free(mac_cb->phy_dev);



	mac_cb->phy_dev = NULL;

}



#define MAC_MEDIA_TYPE_MAX_LEN		16



static const struct {
@@ -1117,7 +1128,11 @@ void hns_mac_uninit(struct dsaf_device *dsaf_dev) 
	int max_port_num = hns_mac_get_max_port_num(dsaf_dev);



	for (i = 0; i < max_port_num; i++) {

		if (!dsaf_dev->mac_cb[i])

			continue;



		dsaf_dev->misc_op->cpld_reset_led(dsaf_dev->mac_cb[i]);

		hns_mac_remove_phydev(dsaf_dev->mac_cb[i]);

		dsaf_dev->mac_cb[i] = NULL;

	}

}

drivers/net/ethernet/hisilicon/hns/hns_dsaf_main.c

+339 −164

File changed.

Preview size limit exceeded, changes collapsed.

drivers/net/ethernet/hisilicon/hns/hns_dsaf_reg.h

+7 −6
Original line number Diff line number Diff line
@@ -176,7 +176,7 @@ 
#define DSAF_INODE_IN_DATA_STP_DISC_0_REG	0x1A50

#define DSAF_INODE_GE_FC_EN_0_REG		0x1B00

#define DSAF_INODE_VC0_IN_PKT_NUM_0_REG		0x1B50

#define DSAF_INODE_VC1_IN_PKT_NUM_0_REG		0x1C00

#define DSAF_INODE_VC1_IN_PKT_NUM_0_REG		0x103C

#define DSAF_INODE_IN_PRIO_PAUSE_BASE_REG	0x1C00

#define DSAF_INODE_IN_PRIO_PAUSE_BASE_OFFSET	0x100

#define DSAF_INODE_IN_PRIO_PAUSE_OFFSET		0x50
@@ -404,11 +404,11 @@ 
#define RCB_ECC_ERR_ADDR4_REG			0x460

#define RCB_ECC_ERR_ADDR5_REG			0x464



#define RCB_COM_SF_CFG_INTMASK_RING		0x480

#define RCB_COM_SF_CFG_RING_STS			0x484

#define RCB_COM_SF_CFG_RING			0x488

#define RCB_COM_SF_CFG_INTMASK_BD		0x48C

#define RCB_COM_SF_CFG_BD_RINT_STS		0x470

#define RCB_COM_SF_CFG_INTMASK_RING		0x470

#define RCB_COM_SF_CFG_RING_STS			0x474

#define RCB_COM_SF_CFG_RING			0x478

#define RCB_COM_SF_CFG_INTMASK_BD		0x47C

#define RCB_COM_SF_CFG_BD_RINT_STS		0x480

#define RCB_COM_RCB_RD_BD_BUSY			0x490

#define RCB_COM_RCB_FBD_CRT_EN			0x494

#define RCB_COM_AXI_WR_ERR_INTMASK		0x498
@@ -534,6 +534,7 @@ 
#define GMAC_LD_LINK_COUNTER_REG		0x01D0UL

#define GMAC_LOOP_REG				0x01DCUL

#define GMAC_RECV_CONTROL_REG			0x01E0UL

#define GMAC_PCS_RX_EN_REG			0x01E4UL

#define GMAC_VLAN_CODE_REG			0x01E8UL

#define GMAC_RX_OVERRUN_CNT_REG			0x01ECUL

#define GMAC_RX_LENGTHFIELD_ERR_CNT_REG		0x01F4UL