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Commit 35e84e0d authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "defconfig: Enable NAND related configs for sdxnightjar"

parents 326a2509 529f2bc4
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+2 −1
Original line number Diff line number Diff line
@@ -480,7 +480,8 @@ CONFIG_FTRACE=y
# CONFIG_CORESIGHT_DUMMY is not set
# CONFIG_CORESIGHT_REMOTE_ETM is not set
# CONFIG_CORESIGHT_TGU is not set
# CONFIG_MTD_MSM_QPIC_NAND is not set
CONFIG_MTD_MSM_QPIC_NAND=y
CONFIG_MTD_RAW_NAND=y
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
+2 −1
Original line number Diff line number Diff line
@@ -403,7 +403,8 @@ CONFIG_CORESIGHT_CTI=y
CONFIG_CORESIGHT_HWEVENT=y
CONFIG_CORESIGHT_REMOTE_ETM=y
CONFIG_FTRACE=y
# CONFIG_MTD_MSM_QPIC_NAND is not set
CONFIG_MTD_MSM_QPIC_NAND=y
CONFIG_MTD_RAW_NAND=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIAL_AMBA_PL010 is not set
# CONFIG_SERIAL_AMBA_PL011 is not set
+73 −0
Original line number Diff line number Diff line
/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
 */

#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDXNIGHTJAR_H
#define __DT_BINDINGS_INTERCONNECT_QCOM_SDXNIGHTJAR_H

#define MASTER_AMPSS_M0				0
#define SNOC_BIMC_MAS				1
#define MASTER_TCU_0				2
#define MASTER_AUDIO				3
#define MASTER_BLSP_1				4
#define MASTER_QPIC				5
#define MASTER_CRYPTO_CORE_0				6
#define MASTER_SDCC_1				7
#define MASTER_SPMI_FETCHER				8
#define SNOC_PNOC_MAS				9
#define PNOC_M_0				10
#define PNOC_M_1				11
#define PNOC_INT_0				12
#define PNOC_INT_1				13
#define PNOC_INT_2				14
#define PNOC_INT_4				15
#define PNOC_INT_5				16
#define PNOC_INT_6				17
#define PNOC_SLV_0				18
#define PNOC_SLV_1				19
#define PNOC_SLV_2				20
#define PNOC_SLV_3				21
#define PNOC_SLV_4				22
#define PNOC_SLV_7				23
#define PNOC_SLV_8				24
#define MASTER_QDSS_BAM				25
#define BIMC_SNOC_MAS				26
#define BIMC_SNOC_1_MAS				27
#define MASTER_IPA				28
#define MASTER_USB3				29
#define PNOC_SNOC_MAS				30
#define MASTER_QDSS_ETR				31
#define MASTER_PCIE				32
#define SLAVE_EBI_CH0				512
#define BIMC_SNOC_SLV				513
#define BIMC_SNOC_1_SLV				514
#define SLAVE_TCSR				515
#define SLAVE_TLMM				516
#define SLAVE_CRYPTO_0_CFG				517
#define SLAVE_MESSAGE_RAM				518
#define SLAVE_PDM				519
#define SLAVE_PRNG				520
#define SLAVE_PMIC_ARB				521
#define SLAVE_SNOC_CFG				522
#define SLAVE_SDCC_1				523
#define SLAVE_BLSP_1				524
#define SLAVE_DCC_CFG				525
#define SLAVE_AUDIO				526
#define SLAVE_SPMI_FETCHER				527
#define SLAVE_TCU				528
#define PNOC_SNOC_SLV				529
#define SLAVE_PCIE_PARF				530
#define SLAVE_USB3_PHY_CFG				531
#define SLAVE_QPIC				532
#define SLAVE_IPA_CFG				533
#define SLAVE_APPSS				534
#define SNOC_BIMC_SLV				535
#define SLAVE_OCIMEM				536
#define SNOC_PNOC_SLV				537
#define SLAVE_QDSS_STM				538
#define SLAVE_PCIE_0				539
#define SLAVE_USB3				540
#define SLAVE_CATS_128				541

#endif