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Commit 35aec6bc authored by Rick Wertenbroek's avatar Rick Wertenbroek Committed by Greg Kroah-Hartman
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PCI: rockchip: Use u32 variable to access 32-bit registers 

commit 8962b2cb39119cbda4fc69a1f83957824f102f81 upstream.

Previously u16 variables were used to access 32-bit registers, this
resulted in not all of the data being read from the registers. Also
the left shift of more than 16-bits would result in moving data out
of the variable. Use u32 variables to access 32-bit registers

Link: https://lore.kernel.org/r/20230418074700.1083505-10-rick.wertenbroek@gmail.com


Fixes: cf590b07 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller")
Tested-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Signed-off-by: default avatarRick Wertenbroek <rick.wertenbroek@gmail.com>
Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 13b93891

drivers/pci/controller/pcie-rockchip-ep.c

+5 −5
Original line number Diff line number Diff line
@@ -313,15 +313,15 @@ static int rockchip_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, 
{

	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);

	struct rockchip_pcie *rockchip = &ep->rockchip;

	u16 flags;

	u32 flags;



	flags = rockchip_pcie_read(rockchip,

				   ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +

				   ROCKCHIP_PCIE_EP_MSI_CTRL_REG);

	flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK;

	flags |=

	   ((multi_msg_cap << 1) <<  ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |

	   PCI_MSI_FLAGS_64BIT;

	   (multi_msg_cap << ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET) |

	   (PCI_MSI_FLAGS_64BIT << ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET);

	flags &= ~ROCKCHIP_PCIE_EP_MSI_CTRL_MASK_MSI_CAP;

	rockchip_pcie_write(rockchip, flags,

			    ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
@@ -333,7 +333,7 @@ static int rockchip_pcie_ep_get_msi(struct pci_epc *epc, u8 fn) 
{

	struct rockchip_pcie_ep *ep = epc_get_drvdata(epc);

	struct rockchip_pcie *rockchip = &ep->rockchip;

	u16 flags;

	u32 flags;



	flags = rockchip_pcie_read(rockchip,

				   ROCKCHIP_PCIE_EP_FUNC_BASE(fn) +
@@ -394,7 +394,7 @@ static int rockchip_pcie_ep_send_msi_irq(struct rockchip_pcie_ep *ep, u8 fn, 
					 u8 interrupt_num)

{

	struct rockchip_pcie *rockchip = &ep->rockchip;

	u16 flags, mme, data, data_mask;

	u32 flags, mme, data, data_mask;

	u8 msi_count;

	u64 pci_addr, pci_addr_mask = 0xff;

drivers/pci/controller/pcie-rockchip.h

+1 −0
Original line number Diff line number Diff line
@@ -232,6 +232,7 @@ 
#define ROCKCHIP_PCIE_EP_CMD_STATUS			0x4

#define   ROCKCHIP_PCIE_EP_CMD_STATUS_IS		BIT(19)

#define ROCKCHIP_PCIE_EP_MSI_CTRL_REG			0x90

#define   ROCKCHIP_PCIE_EP_MSI_FLAGS_OFFSET		16

#define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_OFFSET		17

#define   ROCKCHIP_PCIE_EP_MSI_CTRL_MMC_MASK		GENMASK(19, 17)

#define   ROCKCHIP_PCIE_EP_MSI_CTRL_MME_OFFSET		20