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Commit 352ee868 authored by Pavan Kunapuli's avatar Pavan Kunapuli Committed by Ulf Hansson
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mmc: tegra: Write xfer_mode, CMD regs in together 



If there is a gap between xfer mode and command register writes,
tegra SDMMC controller can sometimes issue a spurious command before
the CMD register is written. To avoid this, these two registers need
to be written together in a single write operation.

This is implemented as an NVQUIRK as it applies to T114, T124 and
T132.

Signed-off-by: default avatarPavan Kunapuli <pkunapuli@nvidia.com>
Signed-off-by: default avatarRhyland Klein <rklein@nvidia.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 0501be64

drivers/mmc/host/sdhci-tegra.c

+29 −1
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ 
#define NVQUIRK_DISABLE_SDR50		BIT(3)

#define NVQUIRK_DISABLE_SDR104		BIT(4)

#define NVQUIRK_DISABLE_DDR50		BIT(5)

#define NVQUIRK_SHADOW_XFER_MODE_REG	BIT(6)



struct sdhci_tegra_soc_data {

	const struct sdhci_pltfm_data *pdata;
@@ -67,6 +68,31 @@ static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg) 
	return readw(host->ioaddr + reg);

}



static void tegra_sdhci_writew(struct sdhci_host *host, u16 val, int reg)

{

	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);

	struct sdhci_tegra *tegra_host = pltfm_host->priv;

	const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;



	if (soc_data->nvquirks & NVQUIRK_SHADOW_XFER_MODE_REG) {

		switch (reg) {

		case SDHCI_TRANSFER_MODE:

			/*

			 * Postpone this write, we must do it together with a

			 * command write that is down below.

			 */

			pltfm_host->xfer_mode_shadow = val;

			return;

		case SDHCI_COMMAND:

			writel((val << 16) | pltfm_host->xfer_mode_shadow,

				host->ioaddr + SDHCI_TRANSFER_MODE);

			return;

		}

	}



	writew(val, host->ioaddr + reg);

}



static void tegra_sdhci_writel(struct sdhci_host *host, u32 val, int reg)

{

	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -147,6 +173,7 @@ static void tegra_sdhci_set_bus_width(struct sdhci_host *host, int bus_width) 
static const struct sdhci_ops tegra_sdhci_ops = {

	.get_ro     = tegra_sdhci_get_ro,

	.read_w     = tegra_sdhci_readw,

	.write_w    = tegra_sdhci_writew,

	.write_l    = tegra_sdhci_writel,

	.set_clock  = sdhci_set_clock,

	.set_bus_width = tegra_sdhci_set_bus_width,
@@ -201,7 +228,8 @@ static struct sdhci_tegra_soc_data soc_data_tegra114 = { 
	.pdata = &sdhci_tegra114_pdata,

	.nvquirks = NVQUIRK_DISABLE_SDR50 |

		    NVQUIRK_DISABLE_DDR50 |

		    NVQUIRK_DISABLE_SDR104,

		    NVQUIRK_DISABLE_SDR104 |

		    NVQUIRK_SHADOW_XFER_MODE_REG,

};



static const struct of_device_id sdhci_tegra_dt_match[] = {