Loading msm/dsi/dsi_ctrl.c +3 −0 Original line number Diff line number Diff line Loading @@ -926,6 +926,9 @@ int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format) case DSI_PIXEL_FORMAT_RGB888: bpp = 24; break; case DSI_PIXEL_FORMAT_RGB101010: bpp = 30; break; default: bpp = 24; break; Loading msm/dsi/dsi_ctrl_hw_cmn.c +8 −5 Original line number Diff line number Diff line Loading @@ -41,9 +41,9 @@ static bool dsi_compression_enabled(struct dsi_mode_info *mode) /* Unsupported formats default to RGB888 */ static const u8 cmd_mode_format_map[DSI_PIXEL_FORMAT_MAX] = { 0x6, 0x7, 0x8, 0x8, 0x0, 0x3, 0x4 }; 0x6, 0x7, 0x8, 0x8, 0x0, 0x3, 0x4, 0x9 }; static const u8 video_mode_format_map[DSI_PIXEL_FORMAT_MAX] = { 0x0, 0x1, 0x2, 0x3, 0x3, 0x3, 0x3 }; 0x0, 0x1, 0x2, 0x3, 0x3, 0x3, 0x3, 0x4 }; /** * dsi_split_link_setup() - setup dsi split link configurations Loading Loading @@ -421,10 +421,13 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl, u32 reg = 0, offset = 0; int pic_width = 0, this_frame_slices = 0, intf_ip_w = 0; u32 pkt_per_line = 0, eol_byte_num = 0, bytes_in_slice = 0; u32 bpp; if (roi && (!roi->w || !roi->h)) return; bpp = dsi_pixel_format_to_bpp(cfg->dst_format); if (dsi_dsc_compression_enabled(mode)) { struct msm_display_dsc_info dsc; Loading Loading @@ -458,11 +461,11 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl, bytes_in_slice = vdc.bytes_in_slice; } else if (roi) { width_final = roi->w; stride_final = roi->w * 3; stride_final = DIV_ROUND_UP(roi->w * bpp, 8); height_final = roi->h; } else { width_final = mode->h_active; stride_final = mode->h_active * 3; stride_final = DIV_ROUND_UP(mode->h_active * bpp, 8); height_final = mode->v_active; } Loading Loading @@ -579,7 +582,7 @@ void dsi_ctrl_hw_cmn_video_engine_setup(struct dsi_ctrl_hw *ctrl, reg |= (cfg->bllp_lp11_en ? BIT(12) : 0); reg |= (cfg->traffic_mode & 0x3) << 8; reg |= (cfg->vc_id & 0x3); reg |= (video_mode_format_map[common_cfg->dst_format] & 0x3) << 4; reg |= (video_mode_format_map[common_cfg->dst_format] & 0x7) << 4; DSI_W32(ctrl, DSI_VIDEO_MODE_CTRL, reg); reg = (common_cfg->swap_mode & 0x7) << 12; Loading msm/dsi/dsi_defs.h +4 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ * @DSI_PIXEL_FORMAT_RGB111: * @DSI_PIXEL_FORMAT_RGB332: * @DSI_PIXEL_FORMAT_RGB444: * @DSI_PIXEL_FORMAT_RGB101010: * @DSI_PIXEL_FORMAT_MAX: */ enum dsi_pixel_format { Loading @@ -49,6 +50,7 @@ enum dsi_pixel_format { DSI_PIXEL_FORMAT_RGB111, DSI_PIXEL_FORMAT_RGB332, DSI_PIXEL_FORMAT_RGB444, DSI_PIXEL_FORMAT_RGB101010, DSI_PIXEL_FORMAT_MAX }; Loading Loading @@ -740,6 +742,8 @@ static inline int dsi_pixel_format_to_bpp(enum dsi_pixel_format fmt) return 8; case DSI_PIXEL_FORMAT_RGB444: return 12; case DSI_PIXEL_FORMAT_RGB101010: return 30; } return 24; } Loading msm/dsi/dsi_panel.c +3 −0 Original line number Diff line number Diff line Loading @@ -933,6 +933,9 @@ static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host, case 18: fmt = DSI_PIXEL_FORMAT_RGB666; break; case 30: fmt = DSI_PIXEL_FORMAT_RGB101010; break; case 24: default: fmt = DSI_PIXEL_FORMAT_RGB888; Loading msm/dsi/dsi_phy_timing_calc.c +2 −2 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. */ #include "dsi_phy_timing_calc.h" static const u32 bits_per_pixel[DSI_PIXEL_FORMAT_MAX] = { 16, 18, 18, 24, 3, 8, 12 }; 16, 18, 18, 24, 3, 8, 12, 30 }; static int dsi_phy_cmn_validate_and_set(struct timing_entry *t, char const *t_name) Loading Loading
msm/dsi/dsi_ctrl.c +3 −0 Original line number Diff line number Diff line Loading @@ -926,6 +926,9 @@ int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format) case DSI_PIXEL_FORMAT_RGB888: bpp = 24; break; case DSI_PIXEL_FORMAT_RGB101010: bpp = 30; break; default: bpp = 24; break; Loading
msm/dsi/dsi_ctrl_hw_cmn.c +8 −5 Original line number Diff line number Diff line Loading @@ -41,9 +41,9 @@ static bool dsi_compression_enabled(struct dsi_mode_info *mode) /* Unsupported formats default to RGB888 */ static const u8 cmd_mode_format_map[DSI_PIXEL_FORMAT_MAX] = { 0x6, 0x7, 0x8, 0x8, 0x0, 0x3, 0x4 }; 0x6, 0x7, 0x8, 0x8, 0x0, 0x3, 0x4, 0x9 }; static const u8 video_mode_format_map[DSI_PIXEL_FORMAT_MAX] = { 0x0, 0x1, 0x2, 0x3, 0x3, 0x3, 0x3 }; 0x0, 0x1, 0x2, 0x3, 0x3, 0x3, 0x3, 0x4 }; /** * dsi_split_link_setup() - setup dsi split link configurations Loading Loading @@ -421,10 +421,13 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl, u32 reg = 0, offset = 0; int pic_width = 0, this_frame_slices = 0, intf_ip_w = 0; u32 pkt_per_line = 0, eol_byte_num = 0, bytes_in_slice = 0; u32 bpp; if (roi && (!roi->w || !roi->h)) return; bpp = dsi_pixel_format_to_bpp(cfg->dst_format); if (dsi_dsc_compression_enabled(mode)) { struct msm_display_dsc_info dsc; Loading Loading @@ -458,11 +461,11 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl, bytes_in_slice = vdc.bytes_in_slice; } else if (roi) { width_final = roi->w; stride_final = roi->w * 3; stride_final = DIV_ROUND_UP(roi->w * bpp, 8); height_final = roi->h; } else { width_final = mode->h_active; stride_final = mode->h_active * 3; stride_final = DIV_ROUND_UP(mode->h_active * bpp, 8); height_final = mode->v_active; } Loading Loading @@ -579,7 +582,7 @@ void dsi_ctrl_hw_cmn_video_engine_setup(struct dsi_ctrl_hw *ctrl, reg |= (cfg->bllp_lp11_en ? BIT(12) : 0); reg |= (cfg->traffic_mode & 0x3) << 8; reg |= (cfg->vc_id & 0x3); reg |= (video_mode_format_map[common_cfg->dst_format] & 0x3) << 4; reg |= (video_mode_format_map[common_cfg->dst_format] & 0x7) << 4; DSI_W32(ctrl, DSI_VIDEO_MODE_CTRL, reg); reg = (common_cfg->swap_mode & 0x7) << 12; Loading
msm/dsi/dsi_defs.h +4 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,7 @@ * @DSI_PIXEL_FORMAT_RGB111: * @DSI_PIXEL_FORMAT_RGB332: * @DSI_PIXEL_FORMAT_RGB444: * @DSI_PIXEL_FORMAT_RGB101010: * @DSI_PIXEL_FORMAT_MAX: */ enum dsi_pixel_format { Loading @@ -49,6 +50,7 @@ enum dsi_pixel_format { DSI_PIXEL_FORMAT_RGB111, DSI_PIXEL_FORMAT_RGB332, DSI_PIXEL_FORMAT_RGB444, DSI_PIXEL_FORMAT_RGB101010, DSI_PIXEL_FORMAT_MAX }; Loading Loading @@ -740,6 +742,8 @@ static inline int dsi_pixel_format_to_bpp(enum dsi_pixel_format fmt) return 8; case DSI_PIXEL_FORMAT_RGB444: return 12; case DSI_PIXEL_FORMAT_RGB101010: return 30; } return 24; } Loading
msm/dsi/dsi_panel.c +3 −0 Original line number Diff line number Diff line Loading @@ -933,6 +933,9 @@ static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host, case 18: fmt = DSI_PIXEL_FORMAT_RGB666; break; case 30: fmt = DSI_PIXEL_FORMAT_RGB101010; break; case 24: default: fmt = DSI_PIXEL_FORMAT_RGB888; Loading
msm/dsi/dsi_phy_timing_calc.c +2 −2 Original line number Diff line number Diff line // SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved. */ #include "dsi_phy_timing_calc.h" static const u32 bits_per_pixel[DSI_PIXEL_FORMAT_MAX] = { 16, 18, 18, 24, 3, 8, 12 }; 16, 18, 18, 24, 3, 8, 12, 30 }; static int dsi_phy_cmn_validate_and_set(struct timing_entry *t, char const *t_name) Loading