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Commit 34af5179 authored by Anson Huang's avatar Anson Huang Committed by Shawn Guo
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clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usage 



1416X/1443X PLL are used on i.MX8MM and i.MX8MN and maybe
other i.MX8M series SoC later, the macro definitions of
these PLLs' initialization should be common for usage.

Signed-off-by: default avatarAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 1e80936a

drivers/clk/imx/clk-imx8mm.c

+0 −17
Original line number Diff line number Diff line
@@ -26,23 +26,6 @@ static u32 share_count_dcss; 
static u32 share_count_pdm;

static u32 share_count_nand;



#define PLL_1416X_RATE(_rate, _m, _p, _s)		\

	{						\

		.rate	=	(_rate),		\

		.mdiv	=	(_m),			\

		.pdiv	=	(_p),			\

		.sdiv	=	(_s),			\

	}



#define PLL_1443X_RATE(_rate, _m, _p, _s, _k)		\

	{						\

		.rate	=	(_rate),		\

		.mdiv	=	(_m),			\

		.pdiv	=	(_p),			\

		.sdiv	=	(_s),			\

		.kdiv	=	(_k),			\

	}



static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = {

	PLL_1416X_RATE(1800000000U, 225, 3, 0),

	PLL_1416X_RATE(1600000000U, 200, 3, 0),

drivers/clk/imx/clk.h

+17 −0
Original line number Diff line number Diff line
@@ -153,6 +153,23 @@ enum imx_pllv3_type { 
struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,

		const char *parent_name, void __iomem *base, u32 div_mask);



#define PLL_1416X_RATE(_rate, _m, _p, _s)		\

	{						\

		.rate	=	(_rate),		\

		.mdiv	=	(_m),			\

		.pdiv	=	(_p),			\

		.sdiv	=	(_s),			\

	}



#define PLL_1443X_RATE(_rate, _m, _p, _s, _k)		\

	{						\

		.rate	=	(_rate),		\

		.mdiv	=	(_m),			\

		.pdiv	=	(_p),			\

		.sdiv	=	(_s),			\

		.kdiv	=	(_k),			\

	}



struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name,

			     void __iomem *base);