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Commit 34686fe6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'omap-fixes-for-linus' of...

Merge branch 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

* 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6:
  omap: DMA: clear interrupt status correctly
  OMAP3: Devkit8000: Fix tps65930 pullup/pulldown configuration
  arm: omap3: cm-t3517: minor comment fix
  arm: omap3: cm-t3517: rtc fix
  omap1: Fix sched_clock implementation when both MPU timer and 32K timer are used
  omap1: Fix booting for 15xx and 730 with omap1_defconfig
  omap1: Fix sched_clock for the MPU timer
  OMAP: PRCM: remove duplicated headers
  OMAP4: clockdomain: bypass unimplemented wake-up dependency functions on OMAP4
  OMAP: counter_32k: init clocksource as part of machine timer init
parents 500d85ce 4fb699b4
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+2 −0
Original line number Original line Diff line number Diff line
@@ -9,6 +9,7 @@ config ARCH_OMAP730
	depends on ARCH_OMAP1
	depends on ARCH_OMAP1
	bool "OMAP730 Based System"
	bool "OMAP730 Based System"
	select CPU_ARM926T
	select CPU_ARM926T
	select OMAP_MPU_TIMER
	select ARCH_OMAP_OTG
	select ARCH_OMAP_OTG


config ARCH_OMAP850
config ARCH_OMAP850
@@ -22,6 +23,7 @@ config ARCH_OMAP15XX
	default y
	default y
	bool "OMAP15xx Based System"
	bool "OMAP15xx Based System"
	select CPU_ARM925T
	select CPU_ARM925T
	select OMAP_MPU_TIMER


config ARCH_OMAP16XX
config ARCH_OMAP16XX
	depends on ARCH_OMAP1
	depends on ARCH_OMAP1
+1 −2
Original line number Original line Diff line number Diff line
@@ -3,12 +3,11 @@
#
#


# Common support
# Common support
obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o
obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
obj-y += clock.o clock_data.o opp_data.o
obj-y += clock.o clock_data.o opp_data.o


obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o


obj-$(CONFIG_OMAP_MPU_TIMER)	+= time.o
obj-$(CONFIG_OMAP_32K_TIMER)	+= timer32k.o
obj-$(CONFIG_OMAP_32K_TIMER)	+= timer32k.o


# Power Management
# Power Management
+94 −7
Original line number Original line Diff line number Diff line
@@ -44,16 +44,21 @@
#include <linux/clocksource.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/clockchips.h>
#include <linux/io.h>
#include <linux/io.h>
#include <linux/sched.h>


#include <asm/system.h>
#include <asm/system.h>
#include <mach/hardware.h>
#include <mach/hardware.h>
#include <asm/leds.h>
#include <asm/leds.h>
#include <asm/irq.h>
#include <asm/irq.h>
#include <asm/sched_clock.h>

#include <asm/mach/irq.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <asm/mach/time.h>


#include <plat/common.h>
#include <plat/common.h>


#ifdef CONFIG_OMAP_MPU_TIMER

#define OMAP_MPU_TIMER_BASE		OMAP_MPU_TIMER1_BASE
#define OMAP_MPU_TIMER_BASE		OMAP_MPU_TIMER1_BASE
#define OMAP_MPU_TIMER_OFFSET		0x100
#define OMAP_MPU_TIMER_OFFSET		0x100


@@ -67,7 +72,7 @@ typedef struct {
((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +	\
((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +	\
				 (n)*OMAP_MPU_TIMER_OFFSET))
				 (n)*OMAP_MPU_TIMER_OFFSET))


static inline unsigned long omap_mpu_timer_read(int nr)
static inline unsigned long notrace omap_mpu_timer_read(int nr)
{
{
	volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
	volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
	return timer->read_tim;
	return timer->read_tim;
@@ -212,6 +217,32 @@ static struct clocksource clocksource_mpu = {
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
};
};


static DEFINE_CLOCK_DATA(cd);

static inline unsigned long long notrace _omap_mpu_sched_clock(void)
{
	u32 cyc = mpu_read(&clocksource_mpu);
	return cyc_to_sched_clock(&cd, cyc, (u32)~0);
}

#ifndef CONFIG_OMAP_32K_TIMER
unsigned long long notrace sched_clock(void)
{
	return _omap_mpu_sched_clock();
}
#else
static unsigned long long notrace omap_mpu_sched_clock(void)
{
	return _omap_mpu_sched_clock();
}
#endif

static void notrace mpu_update_sched_clock(void)
{
	u32 cyc = mpu_read(&clocksource_mpu);
	update_sched_clock(&cd, cyc, (u32)~0);
}

static void __init omap_init_clocksource(unsigned long rate)
static void __init omap_init_clocksource(unsigned long rate)
{
{
	static char err[] __initdata = KERN_ERR
	static char err[] __initdata = KERN_ERR
@@ -219,17 +250,13 @@ static void __init omap_init_clocksource(unsigned long rate)


	setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
	setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
	omap_mpu_timer_start(1, ~0, 1);
	omap_mpu_timer_start(1, ~0, 1);
	init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);


	if (clocksource_register_hz(&clocksource_mpu, rate))
	if (clocksource_register_hz(&clocksource_mpu, rate))
		printk(err, clocksource_mpu.name);
		printk(err, clocksource_mpu.name);
}
}


/*
static void __init omap_mpu_timer_init(void)
 * ---------------------------------------------------------------------------
 * Timer initialization
 * ---------------------------------------------------------------------------
 */
static void __init omap_timer_init(void)
{
{
	struct clk	*ck_ref = clk_get(NULL, "ck_ref");
	struct clk	*ck_ref = clk_get(NULL, "ck_ref");
	unsigned long	rate;
	unsigned long	rate;
@@ -246,6 +273,66 @@ static void __init omap_timer_init(void)
	omap_init_clocksource(rate);
	omap_init_clocksource(rate);
}
}


#else
static inline void omap_mpu_timer_init(void)
{
	pr_err("Bogus timer, should not happen\n");
}
#endif	/* CONFIG_OMAP_MPU_TIMER */

#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
static unsigned long long (*preferred_sched_clock)(void);

unsigned long long notrace sched_clock(void)
{
	if (!preferred_sched_clock)
		return 0;

	return preferred_sched_clock();
}

static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
{
	if (use_32k_sched_clock)
		preferred_sched_clock = omap_32k_sched_clock;
	else
		preferred_sched_clock = omap_mpu_sched_clock;
}
#else
static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
{
}
#endif

static inline int omap_32k_timer_usable(void)
{
	int res = false;

	if (cpu_is_omap730() || cpu_is_omap15xx())
		return res;

#ifdef CONFIG_OMAP_32K_TIMER
	res = omap_32k_timer_init();
#endif

	return res;
}

/*
 * ---------------------------------------------------------------------------
 * Timer initialization
 * ---------------------------------------------------------------------------
 */
static void __init omap_timer_init(void)
{
	if (omap_32k_timer_usable()) {
		preferred_sched_clock_init(1);
	} else {
		omap_mpu_timer_init();
		preferred_sched_clock_init(0);
	}
}

struct sys_timer omap_timer = {
struct sys_timer omap_timer = {
	.init		= omap_timer_init,
	.init		= omap_timer_init,
};
};
+6 −7
Original line number Original line Diff line number Diff line
@@ -52,10 +52,9 @@
#include <asm/irq.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include <asm/mach/time.h>
#include <plat/common.h>
#include <plat/dmtimer.h>
#include <plat/dmtimer.h>


struct sys_timer omap_timer;

/*
/*
 * ---------------------------------------------------------------------------
 * ---------------------------------------------------------------------------
 * 32KHz OS timer
 * 32KHz OS timer
@@ -181,14 +180,14 @@ static __init void omap_init_32k_timer(void)
 * Timer initialization
 * Timer initialization
 * ---------------------------------------------------------------------------
 * ---------------------------------------------------------------------------
 */
 */
static void __init omap_timer_init(void)
bool __init omap_32k_timer_init(void)
{
{
	omap_init_clocksource_32k();

#ifdef CONFIG_OMAP_DM_TIMER
#ifdef CONFIG_OMAP_DM_TIMER
	omap_dm_timer_init();
	omap_dm_timer_init();
#endif
#endif
	omap_init_32k_timer();
	omap_init_32k_timer();
}


struct sys_timer omap_timer = {
	return true;
	.init		= omap_timer_init,
}
};
+24 −5
Original line number Original line Diff line number Diff line
@@ -124,8 +124,9 @@ static inline void cm_t3517_init_hecc(void) {}
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE)
#define RTC_IO_GPIO		(153)
#define RTC_IO_GPIO		(153)
#define RTC_WR_GPIO		(154)
#define RTC_WR_GPIO		(154)
#define RTC_RD_GPIO		(160)
#define RTC_RD_GPIO		(53)
#define RTC_CS_GPIO		(163)
#define RTC_CS_GPIO		(163)
#define RTC_CS_EN_GPIO		(160)


struct v3020_platform_data cm_t3517_v3020_pdata = {
struct v3020_platform_data cm_t3517_v3020_pdata = {
	.use_gpio	= 1,
	.use_gpio	= 1,
@@ -145,6 +146,16 @@ static struct platform_device cm_t3517_rtc_device = {


static void __init cm_t3517_init_rtc(void)
static void __init cm_t3517_init_rtc(void)
{
{
	int err;

	err = gpio_request(RTC_CS_EN_GPIO, "rtc cs en");
	if (err) {
		pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err);
		return;
	}

	gpio_direction_output(RTC_CS_EN_GPIO, 1);

	platform_device_register(&cm_t3517_rtc_device);
	platform_device_register(&cm_t3517_rtc_device);
}
}
#else
#else
@@ -214,12 +225,12 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
	},
	},
	{
	{
		.name           = "linux",
		.name           = "linux",
		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x280000 */
		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x2A0000 */
		.size           = 32 * NAND_BLOCK_SIZE,
		.size           = 32 * NAND_BLOCK_SIZE,
	},
	},
	{
	{
		.name           = "rootfs",
		.name           = "rootfs",
		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x680000 */
		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x6A0000 */
		.size           = MTDPART_SIZ_FULL,
		.size           = MTDPART_SIZ_FULL,
	},
	},
};
};
@@ -256,11 +267,19 @@ static void __init cm_t3517_init_irq(void)
static struct omap_board_mux board_mux[] __initdata = {
static struct omap_board_mux board_mux[] __initdata = {
	/* GPIO186 - Green LED */
	/* GPIO186 - Green LED */
	OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
	OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
	/* RTC GPIOs: IO, WR#, RD#, CS# */

	/* RTC GPIOs: */
	/* IO - GPIO153 */
	OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	/* WR# - GPIO154 */
	OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	/* RD# - GPIO53 */
	OMAP3_MUX(GPMC_NCS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	/* CS# - GPIO163 */
	OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
	/* CS EN - GPIO160 */
	OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),

	/* HSUSB1 RESET */
	/* HSUSB1 RESET */
	OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
	OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
	/* HSUSB2 RESET */
	/* HSUSB2 RESET */
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