Loading qcom/pm7250b.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -9,7 +9,7 @@ interrupt-controller; #interrupt-cells = <4>; qcom,pm7250b@2 { pm7250b_2: qcom,pm7250b@2 { compatible = "qcom,spmi-pmic"; reg = <2 SPMI_USID>; #address-cells = <1>; Loading Loading @@ -408,7 +408,7 @@ }; }; qcom,pm7250b@3 { pm7250b_3: qcom,pm7250b@3 { compatible = "qcom,spmi-pmic"; reg = <3 SPMI_USID>; #address-cells = <1>; Loading qcom/yupik-idp-pm7250b.dtsi +318 −1 Original line number Diff line number Diff line #include "yupik-idp.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/iio/qcom,spmi-vadc.h> #include "yupik-pmic-overlay.dtsi" #include "pm7250b.dtsi" #include "yupik-audio-overlay.dtsi" #include "yupik-pm7250b-thermal-overlay.dtsi" #include "display/yupik-sde-display-idp-pm7250b.dtsi" / { qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2e>; qcom,pmic-id-size = <9>; }; &soc { gpio_keys { compatible = "gpio-keys"; label = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&key_vol_up_default>; vol_up { label = "volume_up"; gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = <KEY_VOLUMEUP>; gpio-key,wakeup; debounce-interval = <15>; linux,can-disable; }; }; }; &qupv3_se9_i2c { status = "ok"; qcom,clk-freq-out = <1000000>; #address-cells = <1>; #size-cells = <0>; nq@28 { compatible = "qcom,sn-nci"; reg = <0x28>; qcom,sn-irq = <&tlmm 41 0x00>; qcom,sn-ven = <&tlmm 38 0x00>; qcom,sn-firm = <&tlmm 40 0x00>; qcom,sn-clkreq = <&tlmm 39 0x00>; qcom,sn-vdd-1p8-supply = <&L18B>; qcom,sn-vdd-1p8-voltage = <1800000 1800000>; qcom,sn-vdd-1p8-current = <157000>; interrupt-parent = <&tlmm>; interrupts = <41 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-yupik"; vdda-phy-supply = <&L10C>; vdda-pll-supply = <&L6B>; vdda-phy-max-microamp = <97500>; vdda-pll-max-microamp = <18400>; status = "ok"; }; &ufshc_mem { vdd-hba-supply = <&gcc_ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&L7B>; vcc-voltage-level = <2504000 2952000>; vcc-low-voltage-sup; vcc-max-microamp = <800000>; /* * Yupik target supports both UFS2.2 & UFS3.1, here * vccq2 is supplied via eLDO, and that is controlled via * L9B which supports a max voltage of 1.2V, but eLDO would * supply 1.8V. and same L9B acts as vccq voltage for UFS3.1 * devices. * Here L9B can max support for 1.2V but UFS GKI driver code * votes for 1.8V, which is leading to failure from pmic * regulator. * * Now since vccq and control of eLDO are common that is L9B * we can use vccq vote as control of eLDO for vccq2. * Hence vccq entries shall be used for both type of UFS * devices only. And vccq entries should not be changed/removed * for any design alteration. */ vccq-supply = <&L9B>; vccq-max-microamp = <900000>; vccq-min-microamp = <10000>; qcom,vddp-ref-clk-supply = <&L9B>; qcom,vddp-ref-clk-max-microamp = <100>; status = "ok"; }; &pm7250b_2 { /* Slave ID - 8 */ reg = <8 SPMI_USID>; }; &pm7250b_3 { /* Slave ID - 9 */ reg = <9 SPMI_USID>; }; &pm7250b_vadc { interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>; smb1390_therm@e { qcom,scale-fn-type = <ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP>; }; charger_skin_therm { reg = <ADC5_AMUX_THM1_100K_PU>; label = "charger_skin_therm"; qcom,ratiometric; qcom,hw-settle-time = <200>; qcom,pre-scaling = <1 1>; }; conn_therm { reg = <ADC5_AMUX_THM3_100K_PU>; label = "conn_therm"; qcom,ratiometric; qcom,hw-settle-time = <200>; qcom,pre-scaling = <1 1>; }; }; &pm7250b_adc_tm { interrupts = <0x8 0x35 0x0 IRQ_TYPE_EDGE_RISING>; io-channels = <&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>, <&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>; /* Channel nodes */ charger_skin_therm { reg = <ADC5_AMUX_THM1_100K_PU>; qcom,ratiometric; qcom,hw-settle-time = <200>; }; conn_therm { reg = <ADC5_AMUX_THM3_100K_PU>; qcom,ratiometric; qcom,hw-settle-time = <200>; }; }; &thermal_zones { chg-skin-therm-usr { polling-delay-passive = <0>; polling-delay = <0>; thermal-governor = "user_space"; thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM1_100K_PU>; wake-capable-sensor; trips { active-config0 { temperature = <125000>; hysteresis = <1000>; type = "passive"; }; }; }; conn-therm-usr { polling-delay-passive = <0>; polling-delay = <0>; thermal-governor = "user_space"; thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM3_100K_PU>; wake-capable-sensor; trips { active-config0 { temperature = <125000>; hysteresis = <1000>; type = "passive"; }; }; }; }; &pm7250b_tz { interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; }; &pm7250b_bcl { interrupts = <0x8 0x1d 0x0 IRQ_TYPE_NONE>, <0x8 0x1d 0x1 IRQ_TYPE_NONE>, <0x8 0x1d 0x2 IRQ_TYPE_NONE>; }; &pm7250b_clkdiv { clocks = <&rpmhcc RPMH_CXO_CLK>; }; &pm7250b_charger { status = "disabled"; }; &pm7250b_qg { status = "disabled"; }; &pm7250b_pdphy { status = "disabled"; }; &spmi_debug_bus { status = "ok"; }; &spmi_glink_debug { status = "ok"; }; &pm8350c_pwm_2 { status = "ok"; }; &pm8350c_switch0 { qcom,led-mask = <9>; /* Channels 1 & 4 */ qcom,symmetry-en; }; &pm8350c_switch1 { qcom,led-mask = <6>; /* Channels 2 & 3 */ qcom,symmetry-en; }; &pm8350c_switch2 { qcom,led-mask = <15>; /* All Channels */ qcom,symmetry-en; }; &pm8350c_flash { status = "ok"; }; &battery_charger { qcom,thermal-mitigation = <3000000 1500000 1000000 500000>; }; &sdhc_1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; pinctrl-1 = <&sdc1_off>; vdd-supply = <&L7B>; qcom,vdd-voltage-level = <2952000 2952000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&L19B>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; status = "ok"; }; &sdhc_2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; vdd-supply = <&L9C>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L6C>; qcom,vdd-io-voltage-level = <1800000 2960000>; qcom,vdd-io-current-level = <0 22000>; cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; status = "ok"; }; &qupv3_se13_i2c { #address-cells = <1>; #size-cells = <0>; status = "ok"; qcom,i2c-touch-active="novatek,NVT-ts"; novatek@62 { compatible = "novatek,NVT-ts"; reg = <0x62>; interrupt-parent = <&tlmm>; interrupts = <81 0x2008>; pinctrl-names = "pmx_ts_active","pmx_ts_suspend", "pmx_ts_release"; pinctrl-0 = <&ts_active>; pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; pinctrl-2 = <&ts_release>; novatek,reset-gpio = <&tlmm 105 0x00>; novatek,irq-gpio = <&tlmm 81 0x2008>; panel = <&dsi_nt36672e_fhd_plus_60_video &dsi_nt36672e_fhd_plus_120_video &dsi_nt36672e_fhd_plus_144_video>; novatek,trusted-touch-mode = "vm_mode"; novatek,touch-environment = "pvm"; novatek,trusted-touch-spi-irq = <601>; novatek,trusted-touch-io-bases = <0xf134000 0xf135000 0xf169000 0xf151000 0xa94000 0x00a10000>; novatek,trusted-touch-io-sizes = <0x1000 0x1000 0x1000 0x1000 0x1000 0x4000>; }; }; #include "camera/yupik-camera-sensor-idp.dtsi" qcom/yupik-pm7250b-thermal-overlay.dtsi 0 → 100644 +226 −0 Original line number Diff line number Diff line #include <dt-bindings/thermal/thermal_qti.h> &mdss_mdp { #cooling-cells = <2>; }; &battery_charger { #cooling-cells = <2>; }; &thermal_zones { socd { cooling-maps { socd_cpu4 { trip = <&socd_trip>; cooling-device = <&cpu4_isolate 1 1>; }; socd_cpu5 { trip = <&socd_trip>; cooling-device = <&cpu5_isolate 1 1>; }; socd_cpu6 { trip = <&socd_trip>; cooling-device = <&cpu6_isolate 1 1>; }; socd_cpu7 { trip = <&socd_trip>; cooling-device = <&cpu7_isolate 1 1>; }; }; }; pm8350c-bcl-lvl0 { disable-thermal-zone; cooling-maps { vph_cpu4 { trip = <&c_bcl_lvl0>; cooling-device = <&cpu4_isolate 1 1>; }; vph_cpu5 { trip = <&c_bcl_lvl0>; cooling-device = <&cpu5_isolate 1 1>; }; vph_gpu0 { trip = <&c_bcl_lvl0>; cooling-device = <&msm_gpu 2 2>; }; vph_cdsp0 { trip = <&c_bcl_lvl0>; cooling-device = <&cdsp_sw 2 2>; }; vbat_modem0 { trip = <&c_bcl_lvl0>; cooling-device = <&modem_pa 2 2>; }; vbat_modem1 { trip = <&c_bcl_lvl0>; cooling-device = <&modem_tj 1 1>; }; }; }; pm8350c-bcl-lvl1 { disable-thermal-zone; cooling-maps { vph_cpu6 { trip = <&c_bcl_lvl1>; cooling-device = <&cpu6_isolate 1 1>; }; vph_cpu7 { trip = <&c_bcl_lvl1>; cooling-device = <&cpu7_isolate 1 1>; }; vph_gpu1 { trip = <&c_bcl_lvl1>; cooling-device = <&msm_gpu 4 4>; }; vph_cdsp1 { trip = <&c_bcl_lvl1>; cooling-device = <&cdsp_sw 4 4>; }; vbat_modem0 { trip = <&c_bcl_lvl1>; cooling-device = <&modem_tj 3 3>; }; }; }; pm8350c-bcl-lvl2 { disable-thermal-zone; cooling-maps { vph_gpu2 { trip = <&c_bcl_lvl2>; cooling-device = <&msm_gpu THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; vph_cdsp2 { trip = <&c_bcl_lvl2>; cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; }; }; pm7325_tz { cooling-maps { pm7325_gpu { trip = <&pm7325_trip0>; cooling-device = <&msm_gpu THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pm7325_cpu1 { trip = <&pm7325_trip0>; cooling-device = <&cpu1_isolate 1 1>; }; pm7325_cpu2 { trip = <&pm7325_trip0>; cooling-device = <&cpu2_isolate 1 1>; }; pm7325_cpu3 { trip = <&pm7325_trip0>; cooling-device = <&cpu3_isolate 1 1>; }; pm7325_cpu4 { trip = <&pm7325_trip0>; cooling-device = <&cpu4_isolate 1 1>; }; pm7325_cpu5 { trip = <&pm7325_trip0>; cooling-device = <&cpu5_isolate 1 1>; }; pm7325_cpu6 { trip = <&pm7325_trip0>; cooling-device = <&cpu6_isolate 1 1>; }; pm7325_cpu7 { trip = <&pm7325_trip0>; cooling-device = <&cpu7_isolate 1 1>; }; }; }; pm8350c_tz { cooling-maps { pm8350c_gpu { trip = <&pm8350c_trip0>; cooling-device = <&msm_gpu THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pm8350c_mdm { trip = <&pm8350c_trip0>; cooling-device = <&modem_tj THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pm8350c_nsp { trip = <&pm8350c_trip0>; cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; }; }; pmr735a_tz { cooling-maps { pmr735a_pa { trip = <&pmr735a_trip0>; cooling-device = <&modem_pa_dsc THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_pa_fr1 { trip = <&pmr735a_trip0>; cooling-device = <&modem_pa_fr1_dsc THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_mmw0 { trip = <&pmr735a_trip0>; cooling-device = <&modem_mmw0 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_mmw1 { trip = <&pmr735a_trip0>; cooling-device = <&modem_mmw1 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_mmw2 { trip = <&pmr735a_trip0>; cooling-device = <&modem_mmw2 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_mmw3 { trip = <&pmr735a_trip0>; cooling-device = <&modem_mmw3 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; }; }; }; Loading
qcom/pm7250b.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -9,7 +9,7 @@ interrupt-controller; #interrupt-cells = <4>; qcom,pm7250b@2 { pm7250b_2: qcom,pm7250b@2 { compatible = "qcom,spmi-pmic"; reg = <2 SPMI_USID>; #address-cells = <1>; Loading Loading @@ -408,7 +408,7 @@ }; }; qcom,pm7250b@3 { pm7250b_3: qcom,pm7250b@3 { compatible = "qcom,spmi-pmic"; reg = <3 SPMI_USID>; #address-cells = <1>; Loading
qcom/yupik-idp-pm7250b.dtsi +318 −1 Original line number Diff line number Diff line #include "yupik-idp.dtsi" #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/iio/qcom,spmi-vadc.h> #include "yupik-pmic-overlay.dtsi" #include "pm7250b.dtsi" #include "yupik-audio-overlay.dtsi" #include "yupik-pm7250b-thermal-overlay.dtsi" #include "display/yupik-sde-display-idp-pm7250b.dtsi" / { qcom,pmic-id = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x2e>; qcom,pmic-id-size = <9>; }; &soc { gpio_keys { compatible = "gpio-keys"; label = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&key_vol_up_default>; vol_up { label = "volume_up"; gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; linux,input-type = <1>; linux,code = <KEY_VOLUMEUP>; gpio-key,wakeup; debounce-interval = <15>; linux,can-disable; }; }; }; &qupv3_se9_i2c { status = "ok"; qcom,clk-freq-out = <1000000>; #address-cells = <1>; #size-cells = <0>; nq@28 { compatible = "qcom,sn-nci"; reg = <0x28>; qcom,sn-irq = <&tlmm 41 0x00>; qcom,sn-ven = <&tlmm 38 0x00>; qcom,sn-firm = <&tlmm 40 0x00>; qcom,sn-clkreq = <&tlmm 39 0x00>; qcom,sn-vdd-1p8-supply = <&L18B>; qcom,sn-vdd-1p8-voltage = <1800000 1800000>; qcom,sn-vdd-1p8-current = <157000>; interrupt-parent = <&tlmm>; interrupts = <41 0>; interrupt-names = "nfc_irq"; pinctrl-names = "nfc_active", "nfc_suspend"; pinctrl-0 = <&nfc_int_active &nfc_enable_active>; pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; }; }; &ufsphy_mem { compatible = "qcom,ufs-phy-qmp-v4-yupik"; vdda-phy-supply = <&L10C>; vdda-pll-supply = <&L6B>; vdda-phy-max-microamp = <97500>; vdda-pll-max-microamp = <18400>; status = "ok"; }; &ufshc_mem { vdd-hba-supply = <&gcc_ufs_phy_gdsc>; vdd-hba-fixed-regulator; vcc-supply = <&L7B>; vcc-voltage-level = <2504000 2952000>; vcc-low-voltage-sup; vcc-max-microamp = <800000>; /* * Yupik target supports both UFS2.2 & UFS3.1, here * vccq2 is supplied via eLDO, and that is controlled via * L9B which supports a max voltage of 1.2V, but eLDO would * supply 1.8V. and same L9B acts as vccq voltage for UFS3.1 * devices. * Here L9B can max support for 1.2V but UFS GKI driver code * votes for 1.8V, which is leading to failure from pmic * regulator. * * Now since vccq and control of eLDO are common that is L9B * we can use vccq vote as control of eLDO for vccq2. * Hence vccq entries shall be used for both type of UFS * devices only. And vccq entries should not be changed/removed * for any design alteration. */ vccq-supply = <&L9B>; vccq-max-microamp = <900000>; vccq-min-microamp = <10000>; qcom,vddp-ref-clk-supply = <&L9B>; qcom,vddp-ref-clk-max-microamp = <100>; status = "ok"; }; &pm7250b_2 { /* Slave ID - 8 */ reg = <8 SPMI_USID>; }; &pm7250b_3 { /* Slave ID - 9 */ reg = <9 SPMI_USID>; }; &pm7250b_vadc { interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>; smb1390_therm@e { qcom,scale-fn-type = <ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP>; }; charger_skin_therm { reg = <ADC5_AMUX_THM1_100K_PU>; label = "charger_skin_therm"; qcom,ratiometric; qcom,hw-settle-time = <200>; qcom,pre-scaling = <1 1>; }; conn_therm { reg = <ADC5_AMUX_THM3_100K_PU>; label = "conn_therm"; qcom,ratiometric; qcom,hw-settle-time = <200>; qcom,pre-scaling = <1 1>; }; }; &pm7250b_adc_tm { interrupts = <0x8 0x35 0x0 IRQ_TYPE_EDGE_RISING>; io-channels = <&pm7250b_vadc ADC5_AMUX_THM1_100K_PU>, <&pm7250b_vadc ADC5_AMUX_THM3_100K_PU>; /* Channel nodes */ charger_skin_therm { reg = <ADC5_AMUX_THM1_100K_PU>; qcom,ratiometric; qcom,hw-settle-time = <200>; }; conn_therm { reg = <ADC5_AMUX_THM3_100K_PU>; qcom,ratiometric; qcom,hw-settle-time = <200>; }; }; &thermal_zones { chg-skin-therm-usr { polling-delay-passive = <0>; polling-delay = <0>; thermal-governor = "user_space"; thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM1_100K_PU>; wake-capable-sensor; trips { active-config0 { temperature = <125000>; hysteresis = <1000>; type = "passive"; }; }; }; conn-therm-usr { polling-delay-passive = <0>; polling-delay = <0>; thermal-governor = "user_space"; thermal-sensors = <&pm7250b_adc_tm ADC5_AMUX_THM3_100K_PU>; wake-capable-sensor; trips { active-config0 { temperature = <125000>; hysteresis = <1000>; type = "passive"; }; }; }; }; &pm7250b_tz { interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; }; &pm7250b_bcl { interrupts = <0x8 0x1d 0x0 IRQ_TYPE_NONE>, <0x8 0x1d 0x1 IRQ_TYPE_NONE>, <0x8 0x1d 0x2 IRQ_TYPE_NONE>; }; &pm7250b_clkdiv { clocks = <&rpmhcc RPMH_CXO_CLK>; }; &pm7250b_charger { status = "disabled"; }; &pm7250b_qg { status = "disabled"; }; &pm7250b_pdphy { status = "disabled"; }; &spmi_debug_bus { status = "ok"; }; &spmi_glink_debug { status = "ok"; }; &pm8350c_pwm_2 { status = "ok"; }; &pm8350c_switch0 { qcom,led-mask = <9>; /* Channels 1 & 4 */ qcom,symmetry-en; }; &pm8350c_switch1 { qcom,led-mask = <6>; /* Channels 2 & 3 */ qcom,symmetry-en; }; &pm8350c_switch2 { qcom,led-mask = <15>; /* All Channels */ qcom,symmetry-en; }; &pm8350c_flash { status = "ok"; }; &battery_charger { qcom,thermal-mitigation = <3000000 1500000 1000000 500000>; }; &sdhc_1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc1_on>; pinctrl-1 = <&sdc1_off>; vdd-supply = <&L7B>; qcom,vdd-voltage-level = <2952000 2952000>; qcom,vdd-current-level = <0 570000>; vdd-io-supply = <&L19B>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <0 325000>; status = "ok"; }; &sdhc_2 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&sdc2_on>; pinctrl-1 = <&sdc2_off>; vdd-supply = <&L9C>; qcom,vdd-voltage-level = <2960000 2960000>; qcom,vdd-current-level = <0 800000>; vdd-io-supply = <&L6C>; qcom,vdd-io-voltage-level = <1800000 2960000>; qcom,vdd-io-current-level = <0 22000>; cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; status = "ok"; }; &qupv3_se13_i2c { #address-cells = <1>; #size-cells = <0>; status = "ok"; qcom,i2c-touch-active="novatek,NVT-ts"; novatek@62 { compatible = "novatek,NVT-ts"; reg = <0x62>; interrupt-parent = <&tlmm>; interrupts = <81 0x2008>; pinctrl-names = "pmx_ts_active","pmx_ts_suspend", "pmx_ts_release"; pinctrl-0 = <&ts_active>; pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>; pinctrl-2 = <&ts_release>; novatek,reset-gpio = <&tlmm 105 0x00>; novatek,irq-gpio = <&tlmm 81 0x2008>; panel = <&dsi_nt36672e_fhd_plus_60_video &dsi_nt36672e_fhd_plus_120_video &dsi_nt36672e_fhd_plus_144_video>; novatek,trusted-touch-mode = "vm_mode"; novatek,touch-environment = "pvm"; novatek,trusted-touch-spi-irq = <601>; novatek,trusted-touch-io-bases = <0xf134000 0xf135000 0xf169000 0xf151000 0xa94000 0x00a10000>; novatek,trusted-touch-io-sizes = <0x1000 0x1000 0x1000 0x1000 0x1000 0x4000>; }; }; #include "camera/yupik-camera-sensor-idp.dtsi"
qcom/yupik-pm7250b-thermal-overlay.dtsi 0 → 100644 +226 −0 Original line number Diff line number Diff line #include <dt-bindings/thermal/thermal_qti.h> &mdss_mdp { #cooling-cells = <2>; }; &battery_charger { #cooling-cells = <2>; }; &thermal_zones { socd { cooling-maps { socd_cpu4 { trip = <&socd_trip>; cooling-device = <&cpu4_isolate 1 1>; }; socd_cpu5 { trip = <&socd_trip>; cooling-device = <&cpu5_isolate 1 1>; }; socd_cpu6 { trip = <&socd_trip>; cooling-device = <&cpu6_isolate 1 1>; }; socd_cpu7 { trip = <&socd_trip>; cooling-device = <&cpu7_isolate 1 1>; }; }; }; pm8350c-bcl-lvl0 { disable-thermal-zone; cooling-maps { vph_cpu4 { trip = <&c_bcl_lvl0>; cooling-device = <&cpu4_isolate 1 1>; }; vph_cpu5 { trip = <&c_bcl_lvl0>; cooling-device = <&cpu5_isolate 1 1>; }; vph_gpu0 { trip = <&c_bcl_lvl0>; cooling-device = <&msm_gpu 2 2>; }; vph_cdsp0 { trip = <&c_bcl_lvl0>; cooling-device = <&cdsp_sw 2 2>; }; vbat_modem0 { trip = <&c_bcl_lvl0>; cooling-device = <&modem_pa 2 2>; }; vbat_modem1 { trip = <&c_bcl_lvl0>; cooling-device = <&modem_tj 1 1>; }; }; }; pm8350c-bcl-lvl1 { disable-thermal-zone; cooling-maps { vph_cpu6 { trip = <&c_bcl_lvl1>; cooling-device = <&cpu6_isolate 1 1>; }; vph_cpu7 { trip = <&c_bcl_lvl1>; cooling-device = <&cpu7_isolate 1 1>; }; vph_gpu1 { trip = <&c_bcl_lvl1>; cooling-device = <&msm_gpu 4 4>; }; vph_cdsp1 { trip = <&c_bcl_lvl1>; cooling-device = <&cdsp_sw 4 4>; }; vbat_modem0 { trip = <&c_bcl_lvl1>; cooling-device = <&modem_tj 3 3>; }; }; }; pm8350c-bcl-lvl2 { disable-thermal-zone; cooling-maps { vph_gpu2 { trip = <&c_bcl_lvl2>; cooling-device = <&msm_gpu THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; vph_cdsp2 { trip = <&c_bcl_lvl2>; cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; }; }; pm7325_tz { cooling-maps { pm7325_gpu { trip = <&pm7325_trip0>; cooling-device = <&msm_gpu THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pm7325_cpu1 { trip = <&pm7325_trip0>; cooling-device = <&cpu1_isolate 1 1>; }; pm7325_cpu2 { trip = <&pm7325_trip0>; cooling-device = <&cpu2_isolate 1 1>; }; pm7325_cpu3 { trip = <&pm7325_trip0>; cooling-device = <&cpu3_isolate 1 1>; }; pm7325_cpu4 { trip = <&pm7325_trip0>; cooling-device = <&cpu4_isolate 1 1>; }; pm7325_cpu5 { trip = <&pm7325_trip0>; cooling-device = <&cpu5_isolate 1 1>; }; pm7325_cpu6 { trip = <&pm7325_trip0>; cooling-device = <&cpu6_isolate 1 1>; }; pm7325_cpu7 { trip = <&pm7325_trip0>; cooling-device = <&cpu7_isolate 1 1>; }; }; }; pm8350c_tz { cooling-maps { pm8350c_gpu { trip = <&pm8350c_trip0>; cooling-device = <&msm_gpu THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pm8350c_mdm { trip = <&pm8350c_trip0>; cooling-device = <&modem_tj THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pm8350c_nsp { trip = <&pm8350c_trip0>; cooling-device = <&cdsp_sw THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; }; }; pmr735a_tz { cooling-maps { pmr735a_pa { trip = <&pmr735a_trip0>; cooling-device = <&modem_pa_dsc THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_pa_fr1 { trip = <&pmr735a_trip0>; cooling-device = <&modem_pa_fr1_dsc THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_mmw0 { trip = <&pmr735a_trip0>; cooling-device = <&modem_mmw0 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_mmw1 { trip = <&pmr735a_trip0>; cooling-device = <&modem_mmw1 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_mmw2 { trip = <&pmr735a_trip0>; cooling-device = <&modem_mmw2 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; pmr735a_mmw3 { trip = <&pmr735a_trip0>; cooling-device = <&modem_mmw3 THERMAL_MAX_LIMIT THERMAL_MAX_LIMIT>; }; }; }; };