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Commit 3411eac1 authored by Vitaly Prosyak's avatar Vitaly Prosyak Committed by Alex Deucher
Browse files

drm/amd/display: [RV] bug in cm programming 



When surface bigger then 10 bpc the output pixel
does not match to the required value.Update CRC's.

Signed-off-by: default avatarVitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: default avatarJordan Lazare <Jordan.Lazare@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent be5a55dc

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h

+5 −1
Original line number Diff line number Diff line
@@ -164,7 +164,8 @@ 
	SRI(CM_IGAM_LUT_RW_CONTROL, CM, id), \

	SRI(CM_IGAM_LUT_RW_INDEX, CM, id), \

	SRI(CM_IGAM_LUT_SEQ_COLOR, CM, id), \

	SRI(CURSOR_CONTROL, CURSOR, id)

	SRI(CURSOR_CONTROL, CURSOR, id), \

	SRI(CM_CMOUT_CONTROL, CM, id)





#define TF_REG_LIST_SH_MASK_DCN(mask_sh)\
@@ -401,6 +402,7 @@ 
	TF_SF(CM0_CM_CONTROL, CM_BYPASS_EN, mask_sh), \

	TF_SF(CM0_CM_IGAM_LUT_SEQ_COLOR, CM_IGAM_LUT_SEQ_COLOR, mask_sh), \

	TF_SF(CNVC_CFG0_FORMAT_CONTROL, OUTPUT_FP, mask_sh), \

	TF_SF(CM0_CM_CMOUT_CONTROL, CM_CMOUT_ROUND_TRUNC_MODE, mask_sh), \

	TF_SF(CURSOR0_CURSOR_CONTROL, CURSOR_MODE, mask_sh), \

	TF_SF(CURSOR0_CURSOR_CONTROL, CURSOR_PITCH, mask_sh), \

	TF_SF(CURSOR0_CURSOR_CONTROL, CURSOR_LINES_PER_CHUNK, mask_sh), \
@@ -549,6 +551,7 @@ 
	type CM_RGAM_RAMA_EXP_REGION33_LUT_OFFSET; \

	type CM_RGAM_RAMA_EXP_REGION33_NUM_SEGMENTS; \

	type CM_RGAM_LUT_MODE; \

	type CM_CMOUT_ROUND_TRUNC_MODE; \

	type OBUF_BYPASS; \

	type OBUF_H_2X_UPSCALE_EN; \

	type CM_BLNDGAM_LUT_MODE; \
@@ -1081,6 +1084,7 @@ struct dcn_dpp_registers { 
	uint32_t CM_RGAM_RAMA_REGION_0_1;

	uint32_t CM_RGAM_RAMA_REGION_32_33;

	uint32_t CM_RGAM_CONTROL;

	uint32_t CM_CMOUT_CONTROL;

	uint32_t OBUF_CONTROL;

	uint32_t CM_BLNDGAM_LUT_WRITE_EN_MASK;

	uint32_t CM_BLNDGAM_CONTROL;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c

+1 −1
Original line number Diff line number Diff line
@@ -602,7 +602,7 @@ static void ippn10_enable_cm_block( 
		struct transform *xfm_base)

{

	struct dcn10_dpp *xfm = TO_DCN10_DPP(xfm_base);



	REG_UPDATE(CM_CMOUT_CONTROL, CM_CMOUT_ROUND_TRUNC_MODE, 8);

	REG_UPDATE(CM_CONTROL, CM_BYPASS_EN, 0);

}