Merge "ARM: dts: msm: enable secondary DSI display for lahaina" (33e04644) · Commits · e / devices / android_kernel_fairphone_FP5

display/dsi-panel-r66451-dsc-qhd-cmd.dtsi

+3 −0

Original line number	Diff line number	Diff line
		@@ -14,6 +14,9 @@
		qcom,dsi-ctrl-num = <0>;
		qcom,dsi-phy-num = <0>;

		qcom,dsi-sec-ctrl-num = <1>;
		qcom,dsi-sec-phy-num = <1>;

		qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
		qcom,mdss-dsi-lane-map = "lane_map_0123";
		qcom,mdss-dsi-bllp-eof-power-mode;

display/lahaina-sde-display-cdp.dtsi

+18 −1

Original line number	Diff line number	Diff line
		@@ -21,12 +21,15 @@

		&dsi_r66451_amoled_cmd {
		qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
		qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
		qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
		qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
		qcom,mdss-dsi-bl-min-level = <1>;
		qcom,mdss-dsi-bl-max-level = <4095>;
		qcom,mdss-brightness-max-level = <255>;
		qcom,platform-te-gpio = <&tlmm 82 0>;
		qcom,platform-reset-gpio = <&tlmm 24 0>;
		qcom,platform-sec-reset-gpio = <&tlmm 25 0>;
		};

		&dsi_r66451_amoled_video {
		@@ -114,11 +117,14 @@

		&dsi_nt35695b_truly_fhd_cmd {
		qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>;
		qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_avdd>;
		qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
		qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_external";
		qcom,mdss-dsi-bl-min-level = <1>;
		qcom,mdss-dsi-bl-max-level = <4095>;
		qcom,platform-te-gpio = <&tlmm 82 0>;
		qcom,platform-reset-gpio = <&tlmm 24 0>;
		qcom,platform-sec-reset-gpio = <&tlmm 25 0>;
		};

		&dsi_sim_cmd {
		@@ -163,7 +169,18 @@
		qcom,platform-reset-gpio = <&tlmm 24 0>;
		};

		&dsi_sim_sec_hd_cmd {
		qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
		qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
		qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
		qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
		qcom,mdss-dsi-bl-min-level = <1>;
		qcom,mdss-dsi-bl-max-level = <1023>;
		qcom,platform-reset-gpio = <&tlmm 24 0>;
		qcom,platform-sec-reset-gpio = <&tlmm 25 0>;
		};


		&sde_dsi {
		qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
		};

display/lahaina-sde-display-mtp.dtsi

+11 −0

Original line number	Diff line number	Diff line
		@@ -61,6 +61,17 @@
		qcom,platform-reset-gpio = <&tlmm 24 0>;
		};

		&dsi_sim_sec_hd_cmd {
		qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
		qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
		qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
		qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
		qcom,mdss-dsi-bl-min-level = <1>;
		qcom,mdss-dsi-bl-max-level = <1023>;
		qcom,platform-reset-gpio = <&tlmm 24 0>;
		qcom,platform-sec-reset-gpio = <&tlmm 25 0>;
		};

		&sde_dsi {
		qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
		};

display/lahaina-sde-display.dtsi

+46 −1

Original line number	Diff line number	Diff line
		@@ -154,6 +154,34 @@
		qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;
		};

		sde_dsi1: qcom,dsi-display-secondary {
		compatible = "qcom,dsi-display";
		label = "secondary";

		qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;
		qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;

		clocks = <&mdss_dsi_phy0 BYTECLK_MUX_0_CLK>,
		<&mdss_dsi_phy0 PCLK_MUX_0_CLK>,
		<&mdss_dsi_phy1 BYTECLK_MUX_1_CLK>,
		<&mdss_dsi_phy1 PCLK_MUX_1_CLK>;
		clock-names = "mux_byte_clk0", "mux_pixel_clk0",
		"mux_byte_clk1", "mux_pixel_clk1";

		pinctrl-names = "panel_active", "panel_suspend";
		pinctrl-0 = <&sde_dsi1_active &sde_te1_active>;
		pinctrl-1 = <&sde_dsi1_suspend &sde_te1_suspend>;

		qcom,platform-te-gpio = <&tlmm 83 0>;
		qcom,panel-te-source = <1>;

		vddio-supply = <&L12C>;
		vdd-supply = <&L13C>;
		avdd-supply = <&display_panel_avdd>;

		qcom,mdp = <&mdss_mdp>;
		};

		sde_wb: qcom,wb-display@0 {
		compatible = "qcom,wb-display";
		cell-index = <0>;
		@@ -162,7 +190,7 @@
		};

		&mdss_mdp {
		connectors = <&sde_dp &sde_wb &sde_dsi &sde_rscc>;
		connectors = <&sde_dp &sde_wb &sde_dsi &sde_dsi1 &sde_rscc>;
		};

		/* PHY TIMINGS REVISION YB */
		@@ -230,6 +258,7 @@
		&dsi_r66451_amoled_cmd {
		qcom,ulps-enabled;
		qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
		qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
		qcom,mdss-dsi-display-timings {
		timing@0 {
		qcom,mdss-dsi-panel-phy-timings = [00 19 08 07 0c 0b 07
		@@ -489,6 +518,7 @@
		qcom,mdss-dsi-panel-on-check-value = <0x9c>;
		qcom,mdss-dsi-panel-status-read-length = <1>;
		qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
		qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
		qcom,mdss-dsi-display-timings {
		timing@0 {
		qcom,mdss-dsi-panel-phy-timings = [00 1b 08 07 0d 0b 08
		@@ -791,3 +821,18 @@
		};
		};
		};

		&dsi_sim_sec_hd_cmd {
		qcom,ulps-enabled;
		qcom,dsi-select-sec-clocks = "mux_byte_clk1", "mux_pixel_clk1";
		qcom,mdss-dsi-display-timings {
		timing@0 {
		qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 24 22
		08 08 05 02 04 00 19 17];
		qcom,display-topology = <1 0 1>;
		qcom,default-topology-index = <0>;
		qcom,panel-roi-alignment = <720 40 720 40 720 40>;
		qcom,partial-update-enabled = "single_roi";
		};
		};
		};