Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 33a9c60a authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add hw gcc reset for sdcc on holi"

parents c2bdb0ee f506fa55

qcom/holi.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -2182,6 +2182,8 @@ 
		mmc-hs400-1_8v;

		mmc-hs400-enhanced-strobe;



		cap-mmc-hw-reset;



		bus-width = <8>;

		non-removable;

		supports-cqe;
@@ -2189,6 +2191,10 @@ 
		qcom,devfreq,freq-table = <50000000 200000000>;

		qcom,scaling-lower-bus-speed-mode = "DDR52";



		/* Add dt entry for gcc hw reset */

		resets = <&gcc GCC_SDCC1_BCR>;

		reset-names = "core_reset";



		status = "disabled";



		qos0 {