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Commit 33640366 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "bindings: clock: Add support for direwolf clock controllers"

parents 6c2f82b1 a70d9dc7

bindings/clock/qcom,debugcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ Required properties : 
			"qcom,scshrike-debugcc"

			"qcom,sm6150-debugcc"

			"qcom,monaco-debugcc"

			"qcom,direwolf-debugcc"



- qcom,gcc: phandle to the GCC device node.

- qcom,videocc: phandle to the Video CC device node.

bindings/clock/qcom,gcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ Required properties : 
			"qcom,sm6150-gcc"

			"qcom,sa6155-gcc"

			"qcom,monaco-gcc"

			"qcom,direwolf-gcc"



- reg : shall contain base register location and length

- vdd_cx-supply: The vdd_cx logic rail supply.

bindings/clock/qcom,rpmh-clk.txt

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ Required properties : 
		"qcom,sm6150-rpmh-clk"

		"qcom,sdxlemur-rpmh-clk"

		"qcom,yupik-rpmh-clk"

		"qcom,direwolf-rpmh-clk"



- #clock-cells : must contain 1