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Commit 333804dc authored by Madhavan Srinivasan's avatar Madhavan Srinivasan Committed by Michael Ellerman
Browse files

powerpc/perf: Update perf_regs structure to include SIER 



On each sample, Sample Instruction Event Register (SIER) content
is saved in pt_regs. SIER does not have a entry as-is in the pt_regs
but instead, SIER content is saved in the "dar" register of pt_regs.

Patch adds another entry to the perf_regs structure to include the "SIER"
printing which internally maps to the "dar" of pt_regs.

It also check for the SIER availability in the platform and present
value accordingly

Signed-off-by: default avatarMadhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 17cfccc9

arch/powerpc/include/asm/perf_event.h

+3 −0
Original line number Diff line number Diff line
@@ -39,4 +39,7 @@ 
		(regs)->gpr[1] = current_stack_pointer();	\

		asm volatile("mfmsr %0" : "=r" ((regs)->msr));	\

	} while (0)



/* To support perf_regs sier update */

extern bool is_sier_available(void);

#endif

arch/powerpc/include/uapi/asm/perf_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ enum perf_event_powerpc_regs { 
	PERF_REG_POWERPC_TRAP,

	PERF_REG_POWERPC_DAR,

	PERF_REG_POWERPC_DSISR,

	PERF_REG_POWERPC_SIER,

	PERF_REG_POWERPC_MAX,

};

#endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */

arch/powerpc/perf/core-book3s.c

+8 −0
Original line number Diff line number Diff line
@@ -130,6 +130,14 @@ static inline void power_pmu_bhrb_read(struct cpu_hw_events *cpuhw) {} 
static void pmao_restore_workaround(bool ebb) { }

#endif /* CONFIG_PPC32 */



bool is_sier_available(void)

{

	if (ppmu->flags & PPMU_HAS_SIER)

		return true;



	return false;

}



static bool regs_use_siar(struct pt_regs *regs)

{

	/*

arch/powerpc/perf/perf_regs.c

+7 −0
Original line number Diff line number Diff line
@@ -69,6 +69,7 @@ static unsigned int pt_regs_offset[PERF_REG_POWERPC_MAX] = { 
	PT_REGS_OFFSET(PERF_REG_POWERPC_TRAP, trap),

	PT_REGS_OFFSET(PERF_REG_POWERPC_DAR, dar),

	PT_REGS_OFFSET(PERF_REG_POWERPC_DSISR, dsisr),

	PT_REGS_OFFSET(PERF_REG_POWERPC_SIER, dar),

};



u64 perf_reg_value(struct pt_regs *regs, int idx)
@@ -76,6 +77,12 @@ u64 perf_reg_value(struct pt_regs *regs, int idx) 
	if (WARN_ON_ONCE(idx >= PERF_REG_POWERPC_MAX))

		return 0;



	if (idx == PERF_REG_POWERPC_SIER &&

	   (IS_ENABLED(CONFIG_FSL_EMB_PERF_EVENT) ||

	    IS_ENABLED(CONFIG_PPC32) ||

	    !is_sier_available()))

		return 0;



	return regs_get_register(regs, pt_regs_offset[idx]);

}

tools/arch/powerpc/include/uapi/asm/perf_regs.h

+1 −0
Original line number Diff line number Diff line
@@ -46,6 +46,7 @@ enum perf_event_powerpc_regs { 
	PERF_REG_POWERPC_TRAP,

	PERF_REG_POWERPC_DAR,

	PERF_REG_POWERPC_DSISR,

	PERF_REG_POWERPC_SIER,

	PERF_REG_POWERPC_MAX,

};

#endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */