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Commit 32ceaa6e authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
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powerpc/8xx: hide itlbie and dtlbie symbols 



When disassembling InstructionTLBError we get the following messy code:

c000138c:       7d 84 63 78     mr      r4,r12
c0001390:       75 25 58 00     andis.  r5,r9,22528
c0001394:       75 2a 40 00     andis.  r10,r9,16384
c0001398:       41 a2 00 08     beq     c00013a0 <itlbie>
c000139c:       7c 00 22 64     tlbie   r4,r0

c00013a0 <itlbie>:
c00013a0:       39 40 04 01     li      r10,1025
c00013a4:       91 4b 00 b0     stw     r10,176(r11)
c00013a8:       39 40 10 32     li      r10,4146
c00013ac:       48 00 cc 59     bl      c000e004 <transfer_to_handler>

For a cleaner code dump, this patch replaces itlbie and dtlbie
symbols by local symbols.

c000138c:       7d 84 63 78     mr      r4,r12
c0001390:       75 25 58 00     andis.  r5,r9,22528
c0001394:       75 2a 40 00     andis.  r10,r9,16384
c0001398:       41 a2 00 08     beq     c00013a0 <InstructionTLBError+0xa0>
c000139c:       7c 00 22 64     tlbie   r4,r0
c00013a0:       39 40 04 01     li      r10,1025
c00013a4:       91 4b 00 b0     stw     r10,176(r11)
c00013a8:       39 40 10 32     li      r10,4146
c00013ac:       48 00 cc 59     bl      c000e004 <transfer_to_handler>
Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent beb4f472

arch/powerpc/kernel/head_8xx.S

+8 −8
Original line number Diff line number Diff line
@@ -551,11 +551,11 @@ InstructionTLBError: 
	mr	r4,r12

	andis.	r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */

	andis.	r10,r9,SRR1_ISI_NOPT@h

	beq+	1f

	beq+	.Litlbie

	tlbie	r4

itlbie:

	/* 0x400 is InstructionAccess exception, needed by bad_page_fault() */

1:	EXC_XFER_LITE(0x400, handle_page_fault)

.Litlbie:

	EXC_XFER_LITE(0x400, handle_page_fault)



/* This is the data TLB error on the MPC8xx.  This could be due to

 * many reasons, including a dirty update to a pte.  We bail out to
@@ -577,10 +577,10 @@ DARFixed:/* Return from dcbx instruction bug workaround */ 
	stw	r5,_DSISR(r11)

	mfspr	r4,SPRN_DAR

	andis.	r10,r5,DSISR_NOHPTE@h

	beq+	1f

	beq+	.Ldtlbie

	tlbie	r4

dtlbie:

1:	li	r10,RPN_PATTERN

.Ldtlbie:

	li	r10,RPN_PATTERN

	mtspr	SPRN_DAR,r10	/* Tag DAR, to be used in DTLB Error */

	/* 0x300 is DataAccess exception, needed by bad_page_fault() */

	EXC_XFER_LITE(0x300, handle_page_fault)
@@ -603,8 +603,8 @@ DataBreakpoint: 
	mtspr	SPRN_SPRG_SCRATCH1, r11

	mfcr	r10

	mfspr	r11, SPRN_SRR0

	cmplwi	cr0, r11, (dtlbie - PAGE_OFFSET)@l

	cmplwi	cr7, r11, (itlbie - PAGE_OFFSET)@l

	cmplwi	cr0, r11, (.Ldtlbie - PAGE_OFFSET)@l

	cmplwi	cr7, r11, (.Litlbie - PAGE_OFFSET)@l

	beq-	cr0, 11f

	beq-	cr7, 11f

	EXCEPTION_PROLOG_1