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Commit 32b1cbe3 authored by Marco Ammon's avatar Marco Ammon Committed by Borislav Petkov
Browse files

x86: Correct misc typos 



Correct spelling typos in comments in different files under arch/x86/.

 [ bp: Merge into a single patch, massage. ]

Signed-off-by: default avatarMarco Ammon <marco.ammon@fau.de>
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Cc: Daniel Bristot de Oliveira <bristot@redhat.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Juergen Gross <jgross@suse.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Nadav Amit <namit@vmware.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Pu Wen <puwen@hygon.cn>
Cc: Rick Edgecombe <rick.p.edgecombe@intel.com>
Cc: "Steven Rostedt (VMware)" <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: trivial@kernel.org
Cc: x86-ml <x86@kernel.org>
Link: https://lkml.kernel.org/r/20190902102436.27396-1-marco.ammon@fau.de
parent cbb1133b

arch/x86/include/asm/text-patching.h

+2 −2
Original line number Diff line number Diff line
@@ -45,8 +45,8 @@ extern void text_poke_early(void *addr, const void *opcode, size_t len); 
 * no thread can be preempted in the instructions being modified (no iret to an

 * invalid instruction possible) or if the instructions are changed from a

 * consistent state to another consistent state atomically.

 * On the local CPU you need to be protected again NMI or MCE handlers seeing an

 * inconsistent instruction while you patch.

 * On the local CPU you need to be protected against NMI or MCE handlers seeing

 * an inconsistent instruction while you patch.

 */

extern void *text_poke(void *addr, const void *opcode, size_t len);

extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);

arch/x86/kernel/alternative.c

+3 −3
Original line number Diff line number Diff line
@@ -713,7 +713,7 @@ void __init alternative_instructions(void) 
	 * Don't stop machine check exceptions while patching.

	 * MCEs only happen when something got corrupted and in this

	 * case we must do something about the corruption.

	 * Ignoring it is worse than a unlikely patching race.

	 * Ignoring it is worse than an unlikely patching race.

	 * Also machine checks tend to be broadcast and if one CPU

	 * goes into machine check the others follow quickly, so we don't

	 * expect a machine check to cause undue problems during to code
@@ -753,8 +753,8 @@ void __init alternative_instructions(void) 
 * When you use this code to patch more than one byte of an instruction

 * you need to make sure that other CPUs cannot execute this code in parallel.

 * Also no thread must be currently preempted in the middle of these

 * instructions. And on the local CPU you need to be protected again NMI or MCE

 * handlers seeing an inconsistent instruction while you patch.

 * instructions. And on the local CPU you need to be protected against NMI or

 * MCE handlers seeing an inconsistent instruction while you patch.

 */

void __init_or_module text_poke_early(void *addr, const void *opcode,

				      size_t len)

arch/x86/kernel/kprobes/opt.c

+1 −1
Original line number Diff line number Diff line
@@ -403,7 +403,7 @@ int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, 
			   (u8 *)op->kp.addr + op->optinsn.size);

	len += RELATIVEJUMP_SIZE;



	/* We have to use text_poke for instuction buffer because it is RO */

	/* We have to use text_poke() for instruction buffer because it is RO */

	text_poke(slot, buf, len);

	ret = 0;

out: