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Commit 32ad348d authored by Steve Cohen's avatar Steve Cohen Committed by Gerrit - the friendly Code Review server
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disp: msm: sde: add MDSS_HW block range for debugfs register access 



Register the MDSS_HW block (at base offset 0) for access via the
sde_reg node in SDE's debugfs directory. This is needed for
validating correct UBWC register programming.

Change-Id: I2494e066a7603747f2ec12546e58a17f2120a521
Signed-off-by: default avatarSteve Cohen <cohens@codeaurora.org>
parent 13a29a28

msm/sde/sde_hw_catalog.c

+2 −0
Original line number Diff line number Diff line
@@ -4391,6 +4391,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) 


	/* default settings for *MOST* targets */

	sde_cfg->has_mixer_combined_alpha = true;

	sde_cfg->mdss_hw_block_size = DEFAULT_MDSS_HW_BLOCK_SIZE;



	/* target specific settings */

	if (IS_MSM8996_TARGET(hw_rev)) {
@@ -4577,6 +4578,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) 
		sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_1;

		sde_cfg->vbif_disable_inner_outer_shareable = true;

		sde_cfg->dither_luma_mode_support = true;

		sde_cfg->mdss_hw_block_size = 0x158;

	} else {

		SDE_ERROR("unsupported chipset id:%X\n", hw_rev);

		sde_cfg->perf.min_prefill_lines = 0xffff;

msm/sde/sde_hw_catalog.h

+5 −0
Original line number Diff line number Diff line
@@ -66,6 +66,9 @@ 


#define SDE_HW_BLK_NAME_LEN	16



/* default size of valid register space for MDSS_HW block (offset 0) */

#define DEFAULT_MDSS_HW_BLOCK_SIZE 0x5C



#define MAX_IMG_WIDTH 0x3fff

#define MAX_IMG_HEIGHT 0x3fff
@@ -1423,6 +1426,7 @@ struct sde_limit_cfg { 
 * @has_sui_blendstage  flag to indicate secure-ui has a blendstage restriction

 * @has_cursor    indicates if hardware cursor is supported

 * @has_vig_p010  indicates if vig pipe supports p010 format

 * @mdss_hw_block_size  Max offset of MDSS_HW block (0 offset), used for debug

 * @inline_rot_formats	formats supported by the inline rotator feature

 * @irq_offset_list     list of sde_intr_irq_offsets to initialize irq table

 * @rc_count	number of rounded corner hardware instances
@@ -1485,6 +1489,7 @@ struct sde_mdss_cfg { 
	bool has_hdr_plus;

	bool has_cursor;

	bool has_vig_p010;

	u32 mdss_hw_block_size;

	u32 mdss_count;

	struct sde_mdss_base_cfg mdss[MAX_BLOCKS];

msm/sde/sde_hw_top.c

+3 −0
Original line number Diff line number Diff line
@@ -615,6 +615,9 @@ struct sde_hw_mdp *sde_hw_mdptop_init(enum sde_mdp idx, 
		goto blk_init_error;

	}



	sde_dbg_reg_register_dump_range(SDE_DBG_NAME, "mdss_hw", 0,

			m->mdss_hw_block_size, 0);



	sde_dbg_reg_register_dump_range(SDE_DBG_NAME, cfg->name,

			mdp->hw.blk_off, mdp->hw.blk_off + mdp->hw.length,

			mdp->hw.xin_id);

msm/sde_dbg.c

+2 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2009-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2009-2020, The Linux Foundation. All rights reserved.

 */



#define pr_fmt(fmt)	"[drm:%s:%d] " fmt, __func__, __LINE__
@@ -25,7 +25,7 @@ 
#define DEFAULT_REGDUMP		SDE_DBG_DUMP_IN_MEM

#define DEFAULT_DBGBUS_SDE	SDE_DBG_DUMP_IN_MEM

#define DEFAULT_DBGBUS_VBIFRT	SDE_DBG_DUMP_IN_MEM

#define DEFAULT_BASE_REG_CNT	0x100

#define DEFAULT_BASE_REG_CNT	DEFAULT_MDSS_HW_BLOCK_SIZE

#define GROUP_BYTES		4

#define ROW_BYTES		16

#define RANGE_NAME_LEN		40