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Commit 31ef489a authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'dmaengine-5.1-rc1' of git://git.infradead.org/users/vkoul/slave-dma 

Pull dmaengine updates from Vinod Koul:

 - dmatest updates for modularizing common struct and code

 - remove SG support for VDMA xilinx IP and updates to driver

 - Update to dw driver to support Intel iDMA controllers multi-block
   support

 - tegra updates for proper reporting of residue

 - Add Snow Ridge ioatdma device id and support for IOATDMA v3.4

 - struct_size() usage and useless LIST_HEAD cleanups in subsystem.

 - qDMA controller driver for Layerscape SoCs

 - stm32-dma PM Runtime support

 - And usual updates to imx-sdma, sprd, Documentation, fsl-edma,
   bcm2835, qcom_hidma etc

* tag 'dmaengine-5.1-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (81 commits)
  dmaengine: imx-sdma: fix consistent dma test failures
  dmaengine: imx-sdma: add a test for imx8mq multi sdma devices
  dmaengine: imx-sdma: add clock ratio 1:1 check
  dmaengine: dmatest: move test data alloc & free into functions
  dmaengine: dmatest: add short-hand `buf_size` var in dmatest_func()
  dmaengine: dmatest: wrap src & dst data into a struct
  dmaengine: ioatdma: support latency tolerance report (LTR) for v3.4
  dmaengine: ioatdma: add descriptor pre-fetch support for v3.4
  dmaengine: ioatdma: disable DCA enabling on IOATDMA v3.4
  dmaengine: ioatdma: Add Snow Ridge ioatdma device id
  dmaengine: sprd: Change channel id to slave id for DMA cell specifier
  dt-bindings: dmaengine: sprd: Change channel id to slave id for DMA cell specifier
  dmaengine: mv_xor: Use correct device for DMA API
  Documentation :dmaengine: clarify DMA desc. pointer after submission
  Documentation: dmaengine: fix dmatest.rst warning
  dmaengine: k3dma: Add support for dma-channel-mask
  dmaengine: k3dma: Delete axi_config
  dmaengine: k3dma: Upgrade k3dma driver to support hisi_asp_dma hardware
  Documentation: bindings: dma: Add binding for dma-channel-mask
  Documentation: bindings: k3dma: Extend the k3dma driver binding to support hisi-asp
  ...
parents 2f194646 feb59d77

Documentation/devicetree/bindings/dma/dma.txt

+4 −0
Original line number Diff line number Diff line
@@ -16,6 +16,9 @@ Optional properties: 
- dma-channels: 	Number of DMA channels supported by the controller.

- dma-requests: 	Number of DMA request signals supported by the

			controller.

- dma-channel-mask:	Bitmask of available DMA channels in ascending order

			that are not reserved by firmware and are available to

			the kernel. i.e. first channel corresponds to LSB.



Example:
@@ -29,6 +32,7 @@ Example: 
		#dma-cells = <1>;

		dma-channels = <32>;

		dma-requests = <127>;

		dma-channel-mask = <0xfffe>

	};



* DMA router

Documentation/devicetree/bindings/dma/fsl-qdma.txt

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+57 −0
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NXP Layerscape SoC qDMA Controller

==================================



This device follows the generic DMA bindings defined in dma/dma.txt.



Required properties:



- compatible:		Must be one of

			 "fsl,ls1021a-qdma": for LS1021A Board

			 "fsl,ls1043a-qdma": for ls1043A Board

			 "fsl,ls1046a-qdma": for ls1046A Board

- reg:			Should contain the register's base address and length.

- interrupts:		Should contain a reference to the interrupt used by this

			device.

- interrupt-names:	Should contain interrupt names:

			 "qdma-queue0": the block0 interrupt

			 "qdma-queue1": the block1 interrupt

			 "qdma-queue2": the block2 interrupt

			 "qdma-queue3": the block3 interrupt

			 "qdma-error":  the error interrupt

- fsl,dma-queues:	Should contain number of queues supported.

- dma-channels:	Number of DMA channels supported

- block-number:	the virtual block number

- block-offset:	the offset of different virtual block

- status-sizes:	status queue size of per virtual block

- queue-sizes:		command queue size of per virtual block, the size number

			based on queues



Optional properties:



- dma-channels:		Number of DMA channels supported by the controller.

- big-endian:		If present registers and hardware scatter/gather descriptors

			of the qDMA are implemented in big endian mode, otherwise in little

			mode.



Examples:



	qdma: dma-controller@8390000 {

			compatible = "fsl,ls1021a-qdma";

			reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */

			      <0x0 0x8389000 0x0 0x1000>, /* Status regs */

			      <0x0 0x838a000 0x0 0x2000>; /* Block regs */

			interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "qdma-error",

				"qdma-queue0", "qdma-queue1";

			dma-channels = <8>;

			block-number = <2>;

			block-offset = <0x1000>;

			fsl,dma-queues = <2>;

			status-sizes = <64>;

			queue-sizes = <64 64>;

			big-endian;

		};



DMA clients must use the format described in dma/dma.txt file.

Documentation/devicetree/bindings/dma/k3dma.txt

+3 −1
Original line number Diff line number Diff line
@@ -3,7 +3,9 @@ 
See dma.txt first



Required properties:

- compatible: Should be "hisilicon,k3-dma-1.0"

- compatible: Must be one of

-              "hisilicon,k3-dma-1.0"

-              "hisilicon,hisi-pcm-asp-dma-1.0"

- reg: Should contain DMA registers location and length.

- interrupts: Should contain one interrupt shared by all channel

- #dma-cells: see dma.txt, should be 1, para number

Documentation/devicetree/bindings/dma/snps-dma.txt

+0 −2
Original line number Diff line number Diff line
@@ -23,8 +23,6 @@ Deprecated properties: 




Optional properties:

- is_private: The device channels should be marked as private and not for by the

  general purpose DMA channel allocator. False if not passed.

- multi-block: Multi block transfers supported by hardware. Array property with

  one cell per channel. 0: not supported, 1 (default): supported.

- snps,dma-protection-control: AHB HPROT[3:1] protection setting.

Documentation/devicetree/bindings/dma/sprd-dma.txt

+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ DMA clients connected to the Spreadtrum DMA controller must use the format 
described in the dma.txt file, using a two-cell specifier for each channel.

The two cells in order are:

1. A phandle pointing to the DMA controller.

2. The channel id.

2. The slave id.



spi0: spi@70a00000{

	...