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Commit 31ec18e0 authored by Russell King's avatar Russell King Committed by Gregory CLEMENT
Browse files

arm64: dts: marvell: mcbin: add pinctrl nodes



Add pinctrl nodes to describe the CPM I2C0 and CPS SPI1 settings.

Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent 2188b396
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+31 −0
Original line number Diff line number Diff line
@@ -112,10 +112,14 @@

&cpm_i2c0 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&cpm_i2c0_pins>;
	status = "okay";
};

&cpm_mdio {
	pinctrl-names = "default";
	pinctrl-0 = <&cpm_ge_mdio_pins>;
	status = "okay";

	ge_phy: ethernet-phy@0 {
@@ -123,6 +127,22 @@
	};
};

&cpm_pinctrl {
	cpm_ge_mdio_pins: ge-mdio-pins {
		marvell,pins = "mpp32", "mpp34";
		marvell,function = "ge";
	};
	cpm_i2c0_pins: i2c0-pins {
		marvell,pins = "mpp37", "mpp38";
		marvell,function = "i2c0";
	};
	cpm_sdhci_pins: sdhci-pins {
		marvell,pins = "mpp55", "mpp56", "mpp57", "mpp58", "mpp59",
			       "mpp60", "mpp61";
		marvell,function = "sdio";
	};
};

&cpm_sata0 {
	/* CPM Lane 0 - U29 */
	status = "okay";
@@ -132,6 +152,8 @@
	/* U6 */
	broken-cd;
	bus-width = <4>;
	pinctrl-names = "default";
	pinctrl-0 = <&cpm_sdhci_pins>;
	status = "okay";
	vqmmc-supply = <&v_3_3>;
};
@@ -157,6 +179,13 @@
	phy-mode = "sgmii";
};

&cps_pinctrl {
	cps_spi1_pins: spi1-pins {
		marvell,pins = "mpp12", "mpp13", "mpp14", "mpp15", "mpp16";
		marvell,function = "spi1";
	};
};

&cps_sata0 {
	/* CPS Lane 1 - U32 */
	/* CPS Lane 3 - U31 */
@@ -164,6 +193,8 @@
};

&cps_spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&cps_spi1_pins>;
	status = "okay";

	spi-flash@0 {