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Commit 3123237a authored by Carolyn Wyborny's avatar Carolyn Wyborny Committed by Jeff Kirsher
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i40e: Add support for 25G devices 



Add support for 25G devices - defines and data structures.

One tricky part here is that the firmware support for these
Devices introduces a mismatch between the PHY type enum and
the bitfields for the phy types.

This change creates a macro and uses it to increment the 25G
PHY values when creating 25G bitfields.

Change-ID: I69b24d837d44cf9220bf5cb8dd46c5be89ce490b
Signed-off-by: default avatarCarolyn Wyborny <carolyn.wyborny@intel.com>
Signed-off-by: default avatarMitch Williams <mitch.a.williams@intel.com>
Tested-by: default avatarAndrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 5951cf94

drivers/net/ethernet/intel/i40e/i40e_adminq_cmd.h

+27 −3
Original line number Diff line number Diff line
@@ -1642,6 +1642,10 @@ enum i40e_aq_phy_type { 
	I40E_PHY_TYPE_1000BASE_LX		= 0x1C,

	I40E_PHY_TYPE_1000BASE_T_OPTICAL	= 0x1D,

	I40E_PHY_TYPE_20GBASE_KR2		= 0x1E,

	I40E_PHY_TYPE_25GBASE_KR		= 0x1F,

	I40E_PHY_TYPE_25GBASE_CR		= 0x20,

	I40E_PHY_TYPE_25GBASE_SR		= 0x21,

	I40E_PHY_TYPE_25GBASE_LR		= 0x22,

	I40E_PHY_TYPE_MAX

};
@@ -1650,6 +1654,7 @@ enum i40e_aq_phy_type { 
#define I40E_LINK_SPEED_10GB_SHIFT	0x3

#define I40E_LINK_SPEED_40GB_SHIFT	0x4

#define I40E_LINK_SPEED_20GB_SHIFT	0x5

#define I40E_LINK_SPEED_25GB_SHIFT	0x6



enum i40e_aq_link_speed {

	I40E_LINK_SPEED_UNKNOWN	= 0,
@@ -1657,7 +1662,8 @@ enum i40e_aq_link_speed { 
	I40E_LINK_SPEED_1GB	= BIT(I40E_LINK_SPEED_1000MB_SHIFT),

	I40E_LINK_SPEED_10GB	= BIT(I40E_LINK_SPEED_10GB_SHIFT),

	I40E_LINK_SPEED_40GB	= BIT(I40E_LINK_SPEED_40GB_SHIFT),

	I40E_LINK_SPEED_20GB	= BIT(I40E_LINK_SPEED_20GB_SHIFT)

	I40E_LINK_SPEED_20GB	= BIT(I40E_LINK_SPEED_20GB_SHIFT),

	I40E_LINK_SPEED_25GB	= BIT(I40E_LINK_SPEED_25GB_SHIFT),

};



struct i40e_aqc_module_desc {
@@ -1690,7 +1696,13 @@ struct i40e_aq_get_phy_abilities_resp { 
	__le32	eeer_val;

	u8	d3_lpan;

#define I40E_AQ_SET_PHY_D3_LPAN_ENA	0x01

	u8	reserved[3];

	u8	phy_type_ext;

#define I40E_AQ_PHY_TYPE_EXT_25G_KR	0X01

#define I40E_AQ_PHY_TYPE_EXT_25G_CR	0X02

#define I40E_AQ_PHY_TYPE_EXT_25G_SR	0x04

#define I40E_AQ_PHY_TYPE_EXT_25G_LR	0x08

	u8	mod_type_ext;

	u8	ext_comp_code;

	u8	phy_id[4];

	u8	module_type[3];

	u8	qualified_module_count;
@@ -1712,7 +1724,12 @@ struct i40e_aq_set_phy_config { /* same bits as above in all */ 
	__le16	eee_capability;

	__le32	eeer;

	u8	low_power_ctrl;

	u8	reserved[3];

	u8	phy_type_ext;

#define I40E_AQ_PHY_TYPE_EXT_25G_KR	0X01

#define I40E_AQ_PHY_TYPE_EXT_25G_CR	0X02

#define I40E_AQ_PHY_TYPE_EXT_25G_SR	0x04

#define I40E_AQ_PHY_TYPE_EXT_25G_LR	0x08

	u8	reserved[2];

};



I40E_CHECK_CMD_LENGTH(i40e_aq_set_phy_config);
@@ -1792,6 +1809,13 @@ struct i40e_aqc_get_link_status { 
#define I40E_AQ_LINK_TX_DRAINED		0x01

#define I40E_AQ_LINK_TX_FLUSHED		0x03

#define I40E_AQ_LINK_FORCED_40G		0x10

/* 25G Error Codes */

#define I40E_AQ_25G_NO_ERR		0X00

#define I40E_AQ_25G_NOT_PRESENT		0X01

#define I40E_AQ_25G_NVM_CRC_ERR		0X02

#define I40E_AQ_25G_SBUS_UCODE_ERR	0X03

#define I40E_AQ_25G_SERDES_UCODE_ERR	0X04

#define I40E_AQ_25G_NIMB_UCODE_ERR	0X05

	u8	loopback; /* use defines from i40e_aqc_set_lb_mode */

	__le16	max_frame_size;

	u8	config;

drivers/net/ethernet/intel/i40e/i40e_common.c

+10 −1
Original line number Diff line number Diff line
@@ -53,6 +53,8 @@ static i40e_status i40e_set_mac_type(struct i40e_hw *hw) 
		case I40E_DEV_ID_10G_BASE_T4:

		case I40E_DEV_ID_20G_KR2:

		case I40E_DEV_ID_20G_KR2_A:

		case I40E_DEV_ID_25G_B:

		case I40E_DEV_ID_25G_SFP28:

			hw->mac.type = I40E_MAC_XL710;

			break;

		case I40E_DEV_ID_KX_X722:
@@ -1183,6 +1185,8 @@ static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw) 
	case I40E_PHY_TYPE_1000BASE_LX:

	case I40E_PHY_TYPE_40GBASE_SR4:

	case I40E_PHY_TYPE_40GBASE_LR4:

	case I40E_PHY_TYPE_25GBASE_LR:

	case I40E_PHY_TYPE_25GBASE_SR:

		media = I40E_MEDIA_TYPE_FIBER;

		break;

	case I40E_PHY_TYPE_100BASE_TX:
@@ -1197,6 +1201,7 @@ static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw) 
	case I40E_PHY_TYPE_10GBASE_SFPP_CU:

	case I40E_PHY_TYPE_40GBASE_AOC:

	case I40E_PHY_TYPE_10GBASE_AOC:

	case I40E_PHY_TYPE_25GBASE_CR:

		media = I40E_MEDIA_TYPE_DA;

		break;

	case I40E_PHY_TYPE_1000BASE_KX:
@@ -1204,6 +1209,7 @@ static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw) 
	case I40E_PHY_TYPE_10GBASE_KR:

	case I40E_PHY_TYPE_40GBASE_KR4:

	case I40E_PHY_TYPE_20GBASE_KR2:

	case I40E_PHY_TYPE_25GBASE_KR:

		media = I40E_MEDIA_TYPE_BACKPLANE;

		break;

	case I40E_PHY_TYPE_SGMII:
@@ -1608,8 +1614,10 @@ i40e_status i40e_aq_get_phy_capabilities(struct i40e_hw *hw, 
	if (hw->aq.asq_last_status == I40E_AQ_RC_EIO)

		status = I40E_ERR_UNKNOWN_PHY;



	if (report_init)

	if (report_init) {

		hw->phy.phy_types = le32_to_cpu(abilities->phy_type);

		hw->phy.phy_types |= ((u64)abilities->phy_type_ext << 32);

	}



	return status;

}
@@ -1701,6 +1709,7 @@ enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, 
			config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;

		/* Copy over all the old settings */

		config.phy_type = abilities.phy_type;

		config.phy_type_ext = abilities.phy_type_ext;

		config.link_speed = abilities.link_speed;

		config.eee_capability = abilities.eee_capability;

		config.eeer = abilities.eeer_val;

drivers/net/ethernet/intel/i40e/i40e_devids.h

+2 −0
Original line number Diff line number Diff line
@@ -39,6 +39,8 @@ 
#define I40E_DEV_ID_20G_KR2		0x1587

#define I40E_DEV_ID_20G_KR2_A		0x1588

#define I40E_DEV_ID_10G_BASE_T4		0x1589

#define I40E_DEV_ID_25G_B		0x158A

#define I40E_DEV_ID_25G_SFP28		0x158B

#define I40E_DEV_ID_KX_X722		0x37CE

#define I40E_DEV_ID_QSFP_X722		0x37CF

#define I40E_DEV_ID_SFP_X722		0x37D0

drivers/net/ethernet/intel/i40e/i40e_ethtool.c

+25 −1
Original line number Diff line number Diff line
@@ -265,8 +265,9 @@ static void i40e_partition_setting_complaint(struct i40e_pf *pf) 
static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported,

				     u32 *advertising)

{

	enum i40e_aq_capabilities_phy_type phy_types = pf->hw.phy.phy_types;

	struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;

	u64 phy_types = pf->hw.phy.phy_types;



	*supported = 0x0;

	*advertising = 0x0;
@@ -369,6 +370,13 @@ static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported, 
			if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))

				*advertising |= ADVERTISED_1000baseKX_Full;

	}

	if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||

	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||

	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||

	    phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {

		*supported |= SUPPORTED_Autoneg;

		*advertising |= ADVERTISED_Autoneg;

	}

}



/**
@@ -491,6 +499,14 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw, 
				     ADVERTISED_1000baseKX_Full |

				     ADVERTISED_Autoneg;

		break;

	case I40E_PHY_TYPE_25GBASE_KR:

	case I40E_PHY_TYPE_25GBASE_CR:

	case I40E_PHY_TYPE_25GBASE_SR:

	case I40E_PHY_TYPE_25GBASE_LR:

		ecmd->supported = SUPPORTED_Autoneg;

		ecmd->advertising = ADVERTISED_Autoneg;

		/* TODO: add speeds when ethtool is ready to support*/

		break;

	default:

		/* if we got here and link is up something bad is afoot */

		netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n",
@@ -512,6 +528,14 @@ static void i40e_get_settings_link_up(struct i40e_hw *hw, 
	case I40E_LINK_SPEED_40GB:

		ethtool_cmd_speed_set(ecmd, SPEED_40000);

		break;

	case I40E_LINK_SPEED_25GB:

#ifdef SPEED_25000

		ethtool_cmd_speed_set(ecmd, SPEED_25000);

#else

		netdev_info(netdev,

			    "Speed is 25G, display not supported by this version of ethtool.\n");

#endif

		break;

	case I40E_LINK_SPEED_20GB:

		ethtool_cmd_speed_set(ecmd, SPEED_20000);

		break;

drivers/net/ethernet/intel/i40e/i40e_main.c

+5 −1
Original line number Diff line number Diff line
@@ -86,6 +86,8 @@ static const struct pci_device_id i40e_pci_tbl[] = { 
	{PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},

	{PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},

	{PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},

	{PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},

	{PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},

	/* required last entry */

	{0, }

};
@@ -5260,6 +5262,9 @@ void i40e_print_link_message(struct i40e_vsi *vsi, bool isup) 
	case I40E_LINK_SPEED_20GB:

		speed = "20 G";

		break;

	case I40E_LINK_SPEED_25GB:

		speed = "25 G";

		break;

	case I40E_LINK_SPEED_10GB:

		speed = "10 G";

		break;
@@ -11368,7 +11373,6 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
		dev_dbg(&pf->pdev->dev, "get supported phy types ret =  %s last_status =  %s\n",

			i40e_stat_str(&pf->hw, err),

			i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));

	pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);



	/* Add a filter to drop all Flow control frames from any VSI from being

	 * transmitted. By doing so we stop a malicious VF from sending out