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Commit 30f4e087 authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nvc0-/gr: make register lists from initvals functions 



Generated context verified to be the same for all supported chipsets.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 791dc143

drivers/gpu/drm/nouveau/Makefile

+12 −2
Original line number Diff line number Diff line
@@ -200,7 +200,12 @@ nouveau-y += core/engine/fifo/nve0.o 
nouveau-y += core/engine/graph/ctxnv40.o

nouveau-y += core/engine/graph/ctxnv50.o

nouveau-y += core/engine/graph/ctxnvc0.o

nouveau-y += core/engine/graph/ctxnve0.o

nouveau-y += core/engine/graph/ctxnvc1.o

nouveau-y += core/engine/graph/ctxnvc3.o

nouveau-y += core/engine/graph/ctxnvc8.o

nouveau-y += core/engine/graph/ctxnvd9.o

nouveau-y += core/engine/graph/ctxnve4.o

nouveau-y += core/engine/graph/ctxnvf0.o

nouveau-y += core/engine/graph/nv04.o

nouveau-y += core/engine/graph/nv10.o

nouveau-y += core/engine/graph/nv20.o
@@ -212,7 +217,12 @@ nouveau-y += core/engine/graph/nv35.o 
nouveau-y += core/engine/graph/nv40.o

nouveau-y += core/engine/graph/nv50.o

nouveau-y += core/engine/graph/nvc0.o

nouveau-y += core/engine/graph/nve0.o

nouveau-y += core/engine/graph/nvc1.o

nouveau-y += core/engine/graph/nvc3.o

nouveau-y += core/engine/graph/nvc8.o

nouveau-y += core/engine/graph/nvd9.o

nouveau-y += core/engine/graph/nve4.o

nouveau-y += core/engine/graph/nvf0.o

nouveau-y += core/engine/mpeg/nv31.o

nouveau-y += core/engine/mpeg/nv40.o

nouveau-y += core/engine/mpeg/nv50.o

drivers/gpu/drm/nouveau/core/engine/device/nvc0.c

+9 −9
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -104,7 +104,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc3_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -133,7 +133,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc3_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -161,7 +161,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc3_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -190,7 +190,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc3_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -219,7 +219,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc1_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -247,7 +247,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvc0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvc8_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -276,7 +276,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvd9_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;
@@ -304,7 +304,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nvc0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nvc0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvd9_graph_oclass;

		device->oclass[NVDEV_ENGINE_VP     ] = &nvc0_vp_oclass;

		device->oclass[NVDEV_ENGINE_BSP    ] = &nvc0_bsp_oclass;

		device->oclass[NVDEV_ENGINE_PPP    ] = &nvc0_ppp_oclass;

drivers/gpu/drm/nouveau/core/engine/device/nve0.c

+4 −4
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nve0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nve0_disp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
@@ -105,7 +105,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nve0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nve0_disp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
@@ -135,7 +135,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nvd0_dmaeng_oclass;

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nve0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nve4_graph_oclass;

		device->oclass[NVDEV_ENGINE_DISP   ] = &nve0_disp_oclass;

		device->oclass[NVDEV_ENGINE_COPY0  ] = &nve0_copy0_oclass;

		device->oclass[NVDEV_ENGINE_COPY1  ] = &nve0_copy1_oclass;
@@ -166,7 +166,7 @@ nve0_identify(struct nouveau_device *device) 
#if 0

		device->oclass[NVDEV_ENGINE_FIFO   ] = &nve0_fifo_oclass;

		device->oclass[NVDEV_ENGINE_SW     ] = &nvc0_software_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] = &nve0_graph_oclass;

		device->oclass[NVDEV_ENGINE_GR     ] =  nvf0_graph_oclass;

#endif

		device->oclass[NVDEV_ENGINE_DISP   ] = &nvf0_disp_oclass;

#if 0

drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c

+1122 −3376

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drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c

0 → 100644
+804 −0

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