Loading arch/arc/kernel/irq.c +1 −1 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ * -Disable all IRQs (on CPU side) * -Optionally, setup the High priority Interrupts as Level 2 IRQs */ void __init arc_init_IRQ(void) void __cpuinit arc_init_IRQ(void) { int level_mask = 0; Loading arch/arc/kernel/setup.c +5 −5 Original line number Diff line number Diff line Loading @@ -31,14 +31,14 @@ int running_on_hw = 1; /* vs. on ISS */ char __initdata command_line[COMMAND_LINE_SIZE]; struct machine_desc *machine_desc __initdata; struct machine_desc *machine_desc __cpuinitdata; struct task_struct *_current_task[NR_CPUS]; /* For stack switching */ struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; void __init read_arc_build_cfg_regs(void) void __cpuinit read_arc_build_cfg_regs(void) { struct bcr_perip uncached_space; struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; Loading Loading @@ -237,7 +237,7 @@ char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len) return buf; } void __init arc_chk_ccms(void) void __cpuinit arc_chk_ccms(void) { #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM) struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; Loading Loading @@ -272,7 +272,7 @@ void __init arc_chk_ccms(void) * hardware has dedicated regs which need to be saved/restored on ctx-sw * (Single Precision uses core regs), thus kernel is kind of oblivious to it */ void __init arc_chk_fpu(void) void __cpuinit arc_chk_fpu(void) { struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; Loading @@ -293,7 +293,7 @@ void __init arc_chk_fpu(void) * such as only for boot CPU etc */ void __init setup_processor(void) void __cpuinit setup_processor(void) { char str[512]; int cpu_id = smp_processor_id(); Loading arch/arc/mm/cache_arc700.c +2 −2 Original line number Diff line number Diff line Loading @@ -109,7 +109,7 @@ char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len) * the cpuinfo structure for later use. * No Validation done here, simply read/convert the BCRs */ void __init read_decode_cache_bcr(void) void __cpuinit read_decode_cache_bcr(void) { struct bcr_cache ibcr, dbcr; struct cpuinfo_arc_cache *p_ic, *p_dc; Loading Loading @@ -141,7 +141,7 @@ void __init read_decode_cache_bcr(void) * 3. Enable the Caches, setup default flush mode for D-Cache * 3. Calculate the SHMLBA used by user space */ void __init arc_cache_init(void) void __cpuinit arc_cache_init(void) { unsigned int temp; unsigned int cpu = smp_processor_id(); Loading arch/arc/mm/tlb.c +2 −2 Original line number Diff line number Diff line Loading @@ -434,7 +434,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddress, * the cpuinfo structure for later use. * No Validation is done here, simply read/convert the BCRs */ void __init read_decode_mmu_bcr(void) void __cpuinit read_decode_mmu_bcr(void) { unsigned int tmp; struct bcr_mmu_1_2 *mmu2; /* encoded MMU2 attr */ Loading Loading @@ -480,7 +480,7 @@ char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len) return buf; } void __init arc_mmu_init(void) void __cpuinit arc_mmu_init(void) { char str[256]; struct cpuinfo_arc_mmu *mmu = &cpuinfo_arc700[smp_processor_id()].mmu; Loading Loading
arch/arc/kernel/irq.c +1 −1 Original line number Diff line number Diff line Loading @@ -26,7 +26,7 @@ * -Disable all IRQs (on CPU side) * -Optionally, setup the High priority Interrupts as Level 2 IRQs */ void __init arc_init_IRQ(void) void __cpuinit arc_init_IRQ(void) { int level_mask = 0; Loading
arch/arc/kernel/setup.c +5 −5 Original line number Diff line number Diff line Loading @@ -31,14 +31,14 @@ int running_on_hw = 1; /* vs. on ISS */ char __initdata command_line[COMMAND_LINE_SIZE]; struct machine_desc *machine_desc __initdata; struct machine_desc *machine_desc __cpuinitdata; struct task_struct *_current_task[NR_CPUS]; /* For stack switching */ struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; void __init read_arc_build_cfg_regs(void) void __cpuinit read_arc_build_cfg_regs(void) { struct bcr_perip uncached_space; struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; Loading Loading @@ -237,7 +237,7 @@ char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len) return buf; } void __init arc_chk_ccms(void) void __cpuinit arc_chk_ccms(void) { #if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM) struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; Loading Loading @@ -272,7 +272,7 @@ void __init arc_chk_ccms(void) * hardware has dedicated regs which need to be saved/restored on ctx-sw * (Single Precision uses core regs), thus kernel is kind of oblivious to it */ void __init arc_chk_fpu(void) void __cpuinit arc_chk_fpu(void) { struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()]; Loading @@ -293,7 +293,7 @@ void __init arc_chk_fpu(void) * such as only for boot CPU etc */ void __init setup_processor(void) void __cpuinit setup_processor(void) { char str[512]; int cpu_id = smp_processor_id(); Loading
arch/arc/mm/cache_arc700.c +2 −2 Original line number Diff line number Diff line Loading @@ -109,7 +109,7 @@ char *arc_cache_mumbojumbo(int cpu_id, char *buf, int len) * the cpuinfo structure for later use. * No Validation done here, simply read/convert the BCRs */ void __init read_decode_cache_bcr(void) void __cpuinit read_decode_cache_bcr(void) { struct bcr_cache ibcr, dbcr; struct cpuinfo_arc_cache *p_ic, *p_dc; Loading Loading @@ -141,7 +141,7 @@ void __init read_decode_cache_bcr(void) * 3. Enable the Caches, setup default flush mode for D-Cache * 3. Calculate the SHMLBA used by user space */ void __init arc_cache_init(void) void __cpuinit arc_cache_init(void) { unsigned int temp; unsigned int cpu = smp_processor_id(); Loading
arch/arc/mm/tlb.c +2 −2 Original line number Diff line number Diff line Loading @@ -434,7 +434,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddress, * the cpuinfo structure for later use. * No Validation is done here, simply read/convert the BCRs */ void __init read_decode_mmu_bcr(void) void __cpuinit read_decode_mmu_bcr(void) { unsigned int tmp; struct bcr_mmu_1_2 *mmu2; /* encoded MMU2 attr */ Loading Loading @@ -480,7 +480,7 @@ char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len) return buf; } void __init arc_mmu_init(void) void __cpuinit arc_mmu_init(void) { char str[256]; struct cpuinfo_arc_mmu *mmu = &cpuinfo_arc700[smp_processor_id()].mmu; Loading