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Commit 2f41cd9b authored by Weiyi Lu's avatar Weiyi Lu Committed by Stephen Boyd
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dt-bindings: ARM: Mediatek: Document bindings for MT8183 



This patch adds the binding documentation for apmixedsys, audiosys,
camsys, imgsys, infracfg, mcucfg, mfgcfg, mmsys, topckgen, vdecsys,
vencsys and ipu for Mediatek MT8183.

Signed-off-by: default avatarWeiyi Lu <weiyi.lu@mediatek.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
parent 9d7e1a82

Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ Required Properties: 
	- "mediatek,mt7629-apmixedsys"

	- "mediatek,mt8135-apmixedsys"

	- "mediatek,mt8173-apmixedsys"

	- "mediatek,mt8183-apmixedsys", "syscon"

- #clock-cells: Must be 1



The apmixedsys controller uses the common clk binding from

Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ Required Properties: 
	- "mediatek,mt2701-audsys", "syscon"

	- "mediatek,mt7622-audsys", "syscon"

	- "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon"

	- "mediatek,mt8183-audiosys", "syscon"

- #clock-cells: Must be 1



The AUDSYS controller uses the common clk binding from

Documentation/devicetree/bindings/arm/mediatek/mediatek,camsys.txt

0 → 100644
+22 −0
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MediaTek CAMSYS controller

============================



The MediaTek camsys controller provides various clocks to the system.



Required Properties:



- compatible: Should be one of:

	- "mediatek,mt8183-camsys", "syscon"

- #clock-cells: Must be 1



The camsys controller uses the common clk binding from

Documentation/devicetree/bindings/clock/clock-bindings.txt

The available clocks are defined in dt-bindings/clock/mt*-clk.h.



Example:



camsys: camsys@1a000000  {

	compatible = "mediatek,mt8183-camsys", "syscon";

	reg = <0 0x1a000000  0 0x1000>;

	#clock-cells = <1>;

};

Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt

+1 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ Required Properties: 
	- "mediatek,mt6797-imgsys", "syscon"

	- "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon"

	- "mediatek,mt8173-imgsys", "syscon"

	- "mediatek,mt8183-imgsys", "syscon"

- #clock-cells: Must be 1



The imgsys controller uses the common clk binding from

Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ Required Properties: 
	- "mediatek,mt7629-infracfg", "syscon"

	- "mediatek,mt8135-infracfg", "syscon"

	- "mediatek,mt8173-infracfg", "syscon"

	- "mediatek,mt8183-infracfg", "syscon"

- #clock-cells: Must be 1

- #reset-cells: Must be 1