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Commit 2f2ce8fe authored by Douglas Anderson's avatar Douglas Anderson Committed by Kishon Vijay Abraham I
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dt-bindings: phy: qcom-qmp: Cleanup the 'reg' documentation as per review 



After the commit 8b1087fa ("phy: qcom-qmp: Fix dts bindings to
reflect reality") landed there was some review feedback that 'reg'
should have been documented differently.  Fix it as per review
feedback.

As per that feedback:
- Subject should have been 'dt-bindings: phy:' which this patch now
  has.
- We should leave no ambiguity in the ordering of 'reg' ranges even if
  'reg-names' are also specified.
- Normally using reg-names is discouraged unless there's a strong
  reason it's needed (like if there are optional ranges).  In this
  case reg-names wasn't needed but the driver already landed relying
  on reg-names so we'll just document it and move on.

Fixes: 8b1087fa ("phy: qcom-qmp: Fix dts bindings to reflect reality")
Suggested-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarDouglas Anderson <dianders@chromium.org>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent 5b394b2d

Documentation/devicetree/bindings/phy/qcom-qmp-phy.txt

+11 −8
Original line number Original line Diff line number Diff line
@@ -13,13 +13,16 @@ Required properties: 
	       "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845.

	       "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845.





- reg:

- reg:

  - index 0: address and length of register set for PHY's common

             serdes block.

  - index 1: address and length of the DP_COM control block (for

             "qcom,sdm845-qmp-usb3-phy" only).



- reg-names:

  - For "qcom,sdm845-qmp-usb3-phy":

  - For "qcom,sdm845-qmp-usb3-phy":

     - index 0: address and length of register set for PHY's common serdes

    - Should be: "reg-base", "dp_com"

       block.

     - named register "dp_com" (using reg-names): address and length of the

       DP_COM control block.

  - For all others:

  - For all others:

     - offset and length of register set for PHY's common serdes block.

    - The reg-names property shouldn't be defined.





 - #clock-cells: must be 1

 - #clock-cells: must be 1

    - Phy pll outputs a bunch of clocks for Tx, Rx and Pipe

    - Phy pll outputs a bunch of clocks for Tx, Rx and Pipe