drm/nouveau/xtensa: switch to device pri macros (2ef770f7) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/gpu/drm/nouveau/nvkm/engine/xtensa.c

+5 −4

Original line number	Diff line number	Diff line
		@@ -27,14 +27,14 @@ u32
		_nvkm_xtensa_rd32(struct nvkm_object *object, u64 addr)
		{
		struct nvkm_xtensa xtensa = (void )object;
		return nv_rd32(xtensa, xtensa->addr + addr);
		return nvkm_rd32(xtensa->engine.subdev.device, xtensa->addr + addr);
		}

		void
		_nvkm_xtensa_wr32(struct nvkm_object *object, u64 addr, u32 data)
		{
		struct nvkm_xtensa xtensa = (void )object;
		nv_wr32(xtensa, xtensa->addr + addr, data);
		nvkm_wr32(xtensa->engine.subdev.device, xtensa->addr + addr, data);
		}

		int
		@@ -55,6 +55,7 @@ void
		_nvkm_xtensa_intr(struct nvkm_subdev *subdev)
		{
		struct nvkm_xtensa xtensa = (void )subdev;
		struct nvkm_device *device = xtensa->engine.subdev.device;
		u32 unk104 = nv_ro32(xtensa, 0xd04);
		u32 intr = nv_ro32(xtensa, 0xc20);
		u32 chan = nv_ro32(xtensa, 0xc28);
		@@ -66,7 +67,7 @@ _nvkm_xtensa_intr(struct nvkm_subdev *subdev)
		intr = nv_ro32(xtensa, 0xc20);
		if (unk104 == 0x10001 && unk10c == 0x200 && chan && !intr) {
		nv_debug(xtensa, "Enabling FIFO_CTRL\n");
		nv_mask(xtensa, xtensa->addr + 0xd94, 0, xtensa->fifo_val);
		nvkm_mask(device, xtensa->addr + 0xd94, 0, xtensa->fifo_val);
		}
		}

		@@ -146,7 +147,7 @@ _nvkm_xtensa_init(struct nvkm_object *object)
		nv_wo32(xtensa, 0xcc4, 0x1c); /* XT_REGION_SETUP */
		nv_wo32(xtensa, 0xcc8, xtensa->gpu_fw->size >> 8); /* XT_REGION_LIMIT */

		tmp = nv_rd32(xtensa, 0x0);
		tmp = nvkm_rd32(device, 0x0);
		nv_wo32(xtensa, 0xde0, tmp); /* SCRATCH_H2X */

		nv_wo32(xtensa, 0xce8, 0xf); /* XT_REGION_SETUP */