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Commit 2ec98f56 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull GPIO updates from Linus Walleij:
 "This is the big slew of GPIO changes for the v5.3 kernel cycle. This
  is mostly incremental work this time.

  Three important things:

   - The FMC subsystem is deleted through my tree. This happens through
     GPIO as its demise was discussed in relation to a patch decoupling
     its GPIO implementation from the standard way of handling GPIO. As
     it turns out, that is not the only subsystem it reimplements and
     the authors think it is better do scratch it and start over using
     the proper kernel subsystems than try to polish the rust shiny. See
     the commit (ACKed by the maintainers) for details.

   - Arnd made a small devres patch that was ACKed by Greg and goes into
     the device core.

   - SPDX header change colissions may happen, because at times I've
     seen that quite a lot changed during the -rc:s in regards to SPDX.
     (It is good stuff, tglx has me convinced, and it is worth the
     occasional pain.)

  Apart from this is is nothing controversial or problematic.

  Summary:

  Core:

   - When a gpio_chip request GPIOs from itself, it can now fully
     control the line characteristics, both machine and consumer flags.
     This makes a lot of sense, but took some time before I figured out
     that this is how it has to work.

   - Several smallish documentation fixes.

  New drivers:

   - The PCA953x driver now supports the TI TCA9539.

   - The DaVinci driver now supports the K3 AM654 SoCs.

  Driver improvements:

   - Major overhaul and hardening of the OMAP driver by Russell King.

   - Starting to move some drivers to the new API passing irq_chip along
     with the gpio_chip when adding the gpio_chip instead of adding it
     separately.

  Unrelated:

   - Delete the FMC subsystem"

* tag 'gpio-v5.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (87 commits)
  Revert "gpio: tegra: Clean-up debugfs initialisation"
  gpiolib: Use spinlock_t instead of struct spinlock
  gpio: stp-xway: allow compile-testing
  gpio: stp-xway: get rid of the #include <lantiq_soc.h> dependency
  gpio: stp-xway: improve module clock error handling
  gpio: stp-xway: simplify error handling in xway_stp_probe()
  gpiolib: Clarify use of non-sleeping functions
  gpiolib: Fix references to gpiod_[gs]et_*value_cansleep() variants
  gpiolib: Document new gpio_chip.init_valid_mask field
  Documentation: gpio: Fix reference to gpiod_get_array()
  gpio: pl061: drop duplicate printing of device name
  gpio: altera: Pass irqchip when adding gpiochip
  gpio: siox: Use devm_ managed gpiochip
  gpio: siox: Add struct device *dev helper variable
  gpio: siox: Pass irqchip when adding gpiochip
  drivers: gpio: amd-fch: make resource struct const
  devres: allow const resource arguments
  gpio: ath79: Pass irqchip when adding gpiochip
  gpio: tegra: Clean-up debugfs initialisation
  gpio: siox: Switch to IRQ_TYPE_NONE
  ...
parents 96407298 9b3b6238
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+18 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ Required Properties:
			"ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L,
						66AK2E SoCs
			"ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G
			"ti,am654-gpio", "ti,keystone-gpio": for TI K3 AM654

- reg: Physical base address of the controller and the size of memory mapped
       registers.
@@ -145,3 +146,20 @@ gpio0: gpio@260bf00 {
	ti,ngpio = <32>;
	ti,davinci-gpio-unbanked = <32>;
};

Example for K3 AM654:

wkup_gpio0: wkup_gpio0@42110000 {
	compatible = "ti,am654-gpio", "ti,keystone-gpio";
	reg = <0x42110000 0x100>;
	gpio-controller;
	#gpio-cells = <2>;
	interrupt-parent = <&intr_wkup_gpio>;
	interrupts = <59 128>, <59 129>, <59 130>, <59 131>;
	interrupt-controller;
	#interrupt-cells = <2>;
	ti,ngpio = <56>;
	ti,davinci-gpio-unbanked = <0>;
	clocks = <&k3_clks 59 0>;
	clock-names = "gpio";
};
+0 −10
Original line number Diff line number Diff line
ARM PL061 GPIO controller

Required properties:
- compatible : "arm,pl061", "arm,primecell"
- #gpio-cells : Should be two. The first cell is the pin number and the
  second cell is used to specify optional parameters:
  - bit 0 specifies polarity (0 for normal, 1 for inverted)
- gpio-controller : Marks the device node as a GPIO controller.
- interrupts : Interrupt mapping for GPIO IRQ.
- gpio-ranges : Interaction with the PINCTRL subsystem.
+69 −0
Original line number Diff line number Diff line
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/gpio/pl061-gpio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: ARM PL061 GPIO controller

maintainers:
  - Linus Walleij <linus.walleij@linaro.org>
  - Rob Herring <robh@kernel.org>

# We need a select here so we don't match all nodes with 'arm,primecell'
select:
  properties:
    compatible:
      contains:
        const: arm,pl061
  required:
    - compatible

properties:
  $nodename:
    pattern: "^gpio@[0-9a-f]+$"

  compatible:
    items:
      - const: arm,pl061
      - const: arm,primecell

  reg:
    maxItems: 1

  interrupts:
    oneOf:
      - maxItems: 1
      - maxItems: 8

  interrupt-controller: true

  "#interrupt-cells":
    const: 2

  clocks:
    maxItems: 1

  clock-names: true

  "#gpio-cells":
    const: 2

  gpio-controller: true

  gpio-ranges:
    maxItems: 8

required:
  - compatible
  - reg
  - interrupts
  - interrupt-controller
  - "#interrupt-cells"
  - clocks
  - "#gpio-cells"
  - gpio-controller

additionalProperties: false

...
+1 −3
Original line number Diff line number Diff line
@@ -283,8 +283,6 @@ To summarize::
  gpiod_set_value(desc, 1);          default (active high)  high
  gpiod_set_value(desc, 0);          active low             high
  gpiod_set_value(desc, 1);          active low             low
  gpiod_set_value(desc, 0);          default (active high)  low
  gpiod_set_value(desc, 1);          default (active high)  high
  gpiod_set_value(desc, 0);          open drain             low
  gpiod_set_value(desc, 1);          open drain             high impedance
  gpiod_set_value(desc, 0);          open source            high impedance
@@ -366,7 +364,7 @@ accessed sequentially.
The functions take three arguments:
	* array_size	- the number of array elements
	* desc_array	- an array of GPIO descriptors
	* array_info	- optional information obtained from gpiod_array_get()
	* array_info	- optional information obtained from gpiod_get_array()
	* value_bitmap	- a bitmap to store the GPIOs' values (get) or
			  a bitmap of values to assign to the GPIOs (set)

+8 −8
Original line number Diff line number Diff line
@@ -235,7 +235,7 @@ means that a pull up or pull-down resistor is available on the output of the
GPIO line, and this resistor is software controlled.

In discrete designs, a pull-up or pull-down resistor is simply soldered on
the circuit board. This is not something we deal or model in software. The
the circuit board. This is not something we deal with or model in software. The
most you will think about these lines is that they will very likely be
configured as open drain or open source (see the section above).

@@ -292,18 +292,18 @@ We can divide GPIO irqchips in two broad categories:

- HIERARCHICAL INTERRUPT CHIPS: this means that each GPIO line has a dedicated
  irq line to a parent interrupt controller one level up. There is no need
  to inquire the GPIO hardware to figure out which line has figured, but it
  may still be necessary to acknowledge the interrupt and set up the
  configuration such as edge sensitivity.
  to inquire the GPIO hardware to figure out which line has fired, but it
  may still be necessary to acknowledge the interrupt and set up configuration
  such as edge sensitivity.

Realtime considerations: a realtime compliant GPIO driver should not use
spinlock_t or any sleepable APIs (like PM runtime) as part of its irqchip
implementation.

- spinlock_t should be replaced with raw_spinlock_t [1].
- spinlock_t should be replaced with raw_spinlock_t.[1]
- If sleepable APIs have to be used, these can be done from the .irq_bus_lock()
  and .irq_bus_unlock() callbacks, as these are the only slowpath callbacks
  on an irqchip. Create the callbacks if needed [2].
  on an irqchip. Create the callbacks if needed.[2]


Cascaded GPIO irqchips
@@ -361,7 +361,7 @@ Cascaded GPIO irqchips usually fall in one of three categories:

  Realtime considerations: this kind of handlers will be forced threaded on -RT,
  and as result the IRQ core will complain that generic_handle_irq() is called
  with IRQ enabled and the same work around as for "CHAINED GPIO irqchips" can
  with IRQ enabled and the same work-around as for "CHAINED GPIO irqchips" can
  be applied.

- NESTED THREADED GPIO IRQCHIPS: these are off-chip GPIO expanders and any
@@ -418,7 +418,7 @@ symbol:

If there is a need to exclude certain GPIO lines from the IRQ domain handled by
these helpers, we can set .irq.need_valid_mask of the gpiochip before
[devm_]gpiochip_add_data() is called. This allocates an .irq.valid_mask with as
``[devm_]gpiochip_add_data()`` is called. This allocates an .irq.valid_mask with as
many bits set as there are GPIO lines in the chip, each bit representing line
0..n-1. Drivers can exclude GPIO lines by clearing bits from this mask. The mask
must be filled in before gpiochip_irqchip_add() or gpiochip_irqchip_add_nested()
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