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Commit 2e8c54db authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-fixes-5.1' of... 

Merge tag 'imx-fixes-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.1:
 - Correct phy mode setting of imx6dl-yapp4 board to fix a problem
   caused by commit 5ecdd77c ("net: dsa: qca8k: disable delay
   for RGMII mode").
 - Add a missing of_node_put call to fix leaked reference detected by
   coccinelle in imx51 machine code.
 - Fix imx6q cpuidle driver bug which causes that CPU might not wake up
   at expected time.
 - Increase reset duration of Ethernet phy Micrel KSZ9031RNX to fix
   transmission timeouts error seen on imx6qdl-phytec-pfla02 board.
 - Correct SPDX License Identifier style for imx6ull-pinfunc-snvs.h.
 - Fix 'bus-witdh' typos in imx6qdl-icore-rqs.dtsi.
 - Correct pseudo PHY address of switch device for imx6dl-yapp4 board.
 - Update PWM driver options in imx defconfig files due to the change
   on driver part.

* tag 'imx-fixes-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx_v4_v5_defconfig: enable PWM driver
  ARM: imx_v6_v7_defconfig: continue compiling the pwm driver
  ARM: dts: imx6dl-yapp4: Use correct pseudo PHY address for the switch
  ARM: dts: imx6qdl: Fix typo in imx6qdl-icore-rqs.dtsi
  ARM: dts: imx6ull: Use the correct style for SPDX License Identifier
  ARM: dts: pfla02: increase phy reset duration
  ARM: imx6q: cpuidle: fix bug that CPU might not wake up at expected time
  ARM: imx51: fix a leaked reference by adding missing of_node_put
  ARM: dts: imx6dl-yapp4: Use rgmii-id phy mode on the cpu port
parents 0cee41d4 507aaeee

arch/arm/boot/dts/imx6dl-yapp4-common.dtsi

+3 −3
Original line number Diff line number Diff line
@@ -114,9 +114,9 @@ 
			reg = <2>;

		};



		switch@0 {

		switch@10 {

			compatible = "qca,qca8334";

			reg = <0>;

			reg = <10>;



			switch_ports: ports {

				#address-cells = <1>;
@@ -125,7 +125,7 @@ 
				ethphy0: port@0 {

					reg = <0>;

					label = "cpu";

					phy-mode = "rgmii";

					phy-mode = "rgmii-id";

					ethernet = <&fec>;



					fixed-link {

arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -264,7 +264,7 @@ 
	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;

	vmcc-supply = <&reg_sd3_vmmc>;

	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;

	bus-witdh = <4>;

	bus-width = <4>;

	no-1-8-v;

	status = "okay";

};
@@ -275,7 +275,7 @@ 
	pinctrl-1 = <&pinctrl_usdhc4_100mhz>;

	pinctrl-2 = <&pinctrl_usdhc4_200mhz>;

	vmcc-supply = <&reg_sd4_vmmc>;

	bus-witdh = <8>;

	bus-width = <8>;

	no-1-8-v;

	non-removable;

	status = "okay";

arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -91,6 +91,7 @@ 
	pinctrl-0 = <&pinctrl_enet>;

	phy-handle = <&ethphy>;

	phy-mode = "rgmii";

	phy-reset-duration = <10>; /* in msecs */

	phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;

	phy-supply = <&vdd_eth_io_reg>;

	status = "disabled";

arch/arm/boot/dts/imx6ull-pinfunc-snvs.h

+1 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/* SPDX-License-Identifier: GPL-2.0 */

/*

 * Copyright (C) 2016 Freescale Semiconductor, Inc.

 * Copyright (C) 2017 NXP

arch/arm/configs/imx_v4_v5_defconfig

+3 −0
Original line number Diff line number Diff line
@@ -170,6 +170,9 @@ CONFIG_IMX_SDMA=y 
# CONFIG_IOMMU_SUPPORT is not set

CONFIG_IIO=y

CONFIG_FSL_MX25_ADC=y

CONFIG_PWM=y

CONFIG_PWM_IMX1=y

CONFIG_PWM_IMX27=y

CONFIG_EXT4_FS=y

# CONFIG_DNOTIFY is not set

CONFIG_VFAT_FS=y