Loading Documentation/arm/memory.txt +5 −6 Original line number Diff line number Diff line Loading @@ -51,15 +51,14 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned ff000000 ffbfffff Reserved for future expansion of DMA mapping region. VMALLOC_END feffffff Free for platform use, recommended. VMALLOC_END must be aligned to a 2MB boundary. VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space. Memory returned by vmalloc/ioremap will be dynamically placed in this region. VMALLOC_START may be based upon the value of the high_memory variable. Machine specific static mappings are also located here through iotable_init(). VMALLOC_START is based upon the value of the high_memory variable, and VMALLOC_END is equal to 0xff000000. PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region. This maps the platforms RAM, and typically Loading Documentation/devicetree/bindings/arm/gic.txt +4 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,10 @@ Optional - interrupts : Interrupt source of the parent interrupt controller. Only present on secondary GICs. - cpu-offset : per-cpu offset within the distributor and cpu interface regions, used when the GIC doesn't have banked registers. The offset is cpu-offset * cpu-nr. Example: intc: interrupt-controller@fff11000 { Loading Documentation/devicetree/bindings/arm/vic.txt 0 → 100644 +29 −0 Original line number Diff line number Diff line * ARM Vectored Interrupt Controller One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM system for interrupt routing. For multiple controllers they can either be nested or have the outputs wire-OR'd together. Required properties: - compatible : should be one of "arm,pl190-vic" "arm,pl192-vic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : The number of cells to define the interrupts. Must be 1 as the VIC has no configuration options for interrupt sources. The cell is a u32 and defines the interrupt number. - reg : The register bank for the VIC. Optional properties: - interrupts : Interrupt source for parent controllers if the VIC is nested. Example: vic0: interrupt-controller@60000 { compatible = "arm,pl192-vic"; interrupt-controller; #interrupt-cells = <1>; reg = <0x60000 0x1000>; }; arch/arm/Kconfig +24 −6 Original line number Diff line number Diff line Loading @@ -342,10 +342,12 @@ config ARCH_HIGHBANK select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 select CACHE_L2X0 select CLKDEV_LOOKUP select CPU_V7 select GENERIC_CLOCKEVENTS select HAVE_ARM_SCU select HAVE_SMP select USE_OF help Support for the Calxeda Highbank SoC based boards. Loading @@ -363,6 +365,7 @@ config ARCH_CNS3XXX select CPU_V6K select GENERIC_CLOCKEVENTS select ARM_GIC select MIGHT_HAVE_CACHE_L2X0 select MIGHT_HAVE_PCI select PCI_DOMAINS if PCI help Loading @@ -383,6 +386,7 @@ config ARCH_PRIMA2 select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP select GENERIC_IRQ_CHIP select MIGHT_HAVE_CACHE_L2X0 select USE_OF select ZONE_DMA help Loading Loading @@ -635,6 +639,8 @@ config ARCH_TEGRA select GENERIC_GPIO select HAVE_CLK select HAVE_SCHED_CLOCK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 select ARCH_HAS_CPUFREQ help This enables support for NVIDIA Tegra based systems (Tegra APX, Loading Loading @@ -704,7 +710,9 @@ config ARCH_SHMOBILE select HAVE_CLK select CLKDEV_LOOKUP select HAVE_MACH_CLKDEV select HAVE_SMP select GENERIC_CLOCKEVENTS select MIGHT_HAVE_CACHE_L2X0 select NO_IOPORT select SPARSE_IRQ select MULTI_IRQ_HANDLER Loading Loading @@ -906,6 +914,8 @@ config ARCH_U8500 select CLKDEV_LOOKUP select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_CPUFREQ select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 help Support for ST-Ericsson's Ux500 architecture Loading @@ -916,6 +926,7 @@ config ARCH_NOMADIK select CPU_ARM926T select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select MIGHT_HAVE_CACHE_L2X0 select ARCH_REQUIRE_GPIOLIB help Support for the Nomadik platform by ST-Ericsson Loading Loading @@ -975,6 +986,7 @@ config ARCH_ZYNQ select ARM_GIC select ARM_AMBA select ICST select MIGHT_HAVE_CACHE_L2X0 select USE_OF help Support for Xilinx Zynq ARM Cortex A9 Platform Loading Loading @@ -1441,14 +1453,20 @@ menu "Kernel Features" source "kernel/time/Kconfig" config HAVE_SMP bool help This option should be selected by machines which have an SMP- capable CPU. The only effect of this option is to make the SMP-related options available to the user for configuration. config SMP bool "Symmetric Multi-Processing" depends on CPU_V6K || CPU_V7 depends on GENERIC_CLOCKEVENTS depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q depends on HAVE_SMP depends on MMU select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP Loading Loading @@ -1988,7 +2006,7 @@ endchoice config XIP_KERNEL bool "Kernel Execute-In-Place from ROM" depends on !ZBOOT_ROM depends on !ZBOOT_ROM && !ARM_LPAE help Execute-In-Place allows the kernel to run from non-volatile storage directly addressable by the CPU, such as NOR flash. This saves RAM Loading Loading @@ -2018,7 +2036,7 @@ config XIP_PHYS_ADDR config KEXEC bool "Kexec system call (EXPERIMENTAL)" depends on EXPERIMENTAL depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot Loading arch/arm/boot/compressed/head.S +1 −0 Original line number Diff line number Diff line Loading @@ -659,6 +659,7 @@ __armv7_mmu_cache_on: mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r1, c3, c0, 0 @ load domain access control #endif mcr p15, 0, r0, c7, c5, 4 @ ISB mcr p15, 0, r0, c1, c0, 0 @ load control register mrc p15, 0, r0, c1, c0, 0 @ and read it back mov r0, #0 Loading Loading
Documentation/arm/memory.txt +5 −6 Original line number Diff line number Diff line Loading @@ -51,15 +51,14 @@ ffc00000 ffefffff DMA memory mapping region. Memory returned ff000000 ffbfffff Reserved for future expansion of DMA mapping region. VMALLOC_END feffffff Free for platform use, recommended. VMALLOC_END must be aligned to a 2MB boundary. VMALLOC_START VMALLOC_END-1 vmalloc() / ioremap() space. Memory returned by vmalloc/ioremap will be dynamically placed in this region. VMALLOC_START may be based upon the value of the high_memory variable. Machine specific static mappings are also located here through iotable_init(). VMALLOC_START is based upon the value of the high_memory variable, and VMALLOC_END is equal to 0xff000000. PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region. This maps the platforms RAM, and typically Loading
Documentation/devicetree/bindings/arm/gic.txt +4 −0 Original line number Diff line number Diff line Loading @@ -42,6 +42,10 @@ Optional - interrupts : Interrupt source of the parent interrupt controller. Only present on secondary GICs. - cpu-offset : per-cpu offset within the distributor and cpu interface regions, used when the GIC doesn't have banked registers. The offset is cpu-offset * cpu-nr. Example: intc: interrupt-controller@fff11000 { Loading
Documentation/devicetree/bindings/arm/vic.txt 0 → 100644 +29 −0 Original line number Diff line number Diff line * ARM Vectored Interrupt Controller One or more Vectored Interrupt Controllers (VIC's) can be connected in an ARM system for interrupt routing. For multiple controllers they can either be nested or have the outputs wire-OR'd together. Required properties: - compatible : should be one of "arm,pl190-vic" "arm,pl192-vic" - interrupt-controller : Identifies the node as an interrupt controller - #interrupt-cells : The number of cells to define the interrupts. Must be 1 as the VIC has no configuration options for interrupt sources. The cell is a u32 and defines the interrupt number. - reg : The register bank for the VIC. Optional properties: - interrupts : Interrupt source for parent controllers if the VIC is nested. Example: vic0: interrupt-controller@60000 { compatible = "arm,pl192-vic"; interrupt-controller; #interrupt-cells = <1>; reg = <0x60000 0x1000>; };
arch/arm/Kconfig +24 −6 Original line number Diff line number Diff line Loading @@ -342,10 +342,12 @@ config ARCH_HIGHBANK select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 select CACHE_L2X0 select CLKDEV_LOOKUP select CPU_V7 select GENERIC_CLOCKEVENTS select HAVE_ARM_SCU select HAVE_SMP select USE_OF help Support for the Calxeda Highbank SoC based boards. Loading @@ -363,6 +365,7 @@ config ARCH_CNS3XXX select CPU_V6K select GENERIC_CLOCKEVENTS select ARM_GIC select MIGHT_HAVE_CACHE_L2X0 select MIGHT_HAVE_PCI select PCI_DOMAINS if PCI help Loading @@ -383,6 +386,7 @@ config ARCH_PRIMA2 select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP select GENERIC_IRQ_CHIP select MIGHT_HAVE_CACHE_L2X0 select USE_OF select ZONE_DMA help Loading Loading @@ -635,6 +639,8 @@ config ARCH_TEGRA select GENERIC_GPIO select HAVE_CLK select HAVE_SCHED_CLOCK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 select ARCH_HAS_CPUFREQ help This enables support for NVIDIA Tegra based systems (Tegra APX, Loading Loading @@ -704,7 +710,9 @@ config ARCH_SHMOBILE select HAVE_CLK select CLKDEV_LOOKUP select HAVE_MACH_CLKDEV select HAVE_SMP select GENERIC_CLOCKEVENTS select MIGHT_HAVE_CACHE_L2X0 select NO_IOPORT select SPARSE_IRQ select MULTI_IRQ_HANDLER Loading Loading @@ -906,6 +914,8 @@ config ARCH_U8500 select CLKDEV_LOOKUP select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_CPUFREQ select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 help Support for ST-Ericsson's Ux500 architecture Loading @@ -916,6 +926,7 @@ config ARCH_NOMADIK select CPU_ARM926T select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select MIGHT_HAVE_CACHE_L2X0 select ARCH_REQUIRE_GPIOLIB help Support for the Nomadik platform by ST-Ericsson Loading Loading @@ -975,6 +986,7 @@ config ARCH_ZYNQ select ARM_GIC select ARM_AMBA select ICST select MIGHT_HAVE_CACHE_L2X0 select USE_OF help Support for Xilinx Zynq ARM Cortex A9 Platform Loading Loading @@ -1441,14 +1453,20 @@ menu "Kernel Features" source "kernel/time/Kconfig" config HAVE_SMP bool help This option should be selected by machines which have an SMP- capable CPU. The only effect of this option is to make the SMP-related options available to the user for configuration. config SMP bool "Symmetric Multi-Processing" depends on CPU_V6K || CPU_V7 depends on GENERIC_CLOCKEVENTS depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \ MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \ ARCH_EXYNOS4 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \ ARCH_MSM_SCORPIONMP || ARCH_SHMOBILE || ARCH_HIGHBANK || SOC_IMX6Q depends on HAVE_SMP depends on MMU select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP Loading Loading @@ -1988,7 +2006,7 @@ endchoice config XIP_KERNEL bool "Kernel Execute-In-Place from ROM" depends on !ZBOOT_ROM depends on !ZBOOT_ROM && !ARM_LPAE help Execute-In-Place allows the kernel to run from non-volatile storage directly addressable by the CPU, such as NOR flash. This saves RAM Loading Loading @@ -2018,7 +2036,7 @@ config XIP_PHYS_ADDR config KEXEC bool "Kexec system call (EXPERIMENTAL)" depends on EXPERIMENTAL depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU) help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot Loading
arch/arm/boot/compressed/head.S +1 −0 Original line number Diff line number Diff line Loading @@ -659,6 +659,7 @@ __armv7_mmu_cache_on: mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer mcrne p15, 0, r1, c3, c0, 0 @ load domain access control #endif mcr p15, 0, r0, c7, c5, 4 @ ISB mcr p15, 0, r0, c1, c0, 0 @ load control register mrc p15, 0, r0, c1, c0, 0 @ and read it back mov r0, #0 Loading