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Commit 2e0d9910 authored by Christian König's avatar Christian König Committed by Dave Airlie
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drm/radeon: make sa bo a stand alone object



Allocating and freeing it seperately.

Signed-off-by: default avatarChristian König <deathsimple@vodafone.de>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent e6661a96
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+2 −2
Original line number Diff line number Diff line
@@ -638,7 +638,7 @@ void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc);
 */

struct radeon_ib {
	struct radeon_sa_bo	sa_bo;
	struct radeon_sa_bo	*sa_bo;
	unsigned		idx;
	uint32_t		length_dw;
	uint64_t		gpu_addr;
@@ -693,7 +693,7 @@ struct radeon_vm {
	unsigned			last_pfn;
	u64				pt_gpu_addr;
	u64				*pt;
	struct radeon_sa_bo		sa_bo;
	struct radeon_sa_bo		*sa_bo;
	struct mutex			mutex;
	/* last fence for cs using this vm */
	struct radeon_fence		*fence;
+2 −2
Original line number Diff line number Diff line
@@ -477,7 +477,7 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
		/* ib pool is bind at 0 in virtual address space to gpu_addr is the
		 * offset inside the pool bo
		 */
		parser->const_ib->gpu_addr = parser->const_ib->sa_bo.soffset;
		parser->const_ib->gpu_addr = parser->const_ib->sa_bo->soffset;
		r = radeon_ib_schedule(rdev, parser->const_ib);
		if (r)
			goto out;
@@ -487,7 +487,7 @@ static int radeon_cs_ib_vm_chunk(struct radeon_device *rdev,
	/* ib pool is bind at 0 in virtual address space to gpu_addr is the
	 * offset inside the pool bo
	 */
	parser->ib->gpu_addr = parser->ib->sa_bo.soffset;
	parser->ib->gpu_addr = parser->ib->sa_bo->soffset;
	parser->ib->is_const_ib = false;
	r = radeon_ib_schedule(rdev, parser->ib);
out:
+2 −2
Original line number Diff line number Diff line
@@ -404,8 +404,8 @@ int radeon_vm_bind(struct radeon_device *rdev, struct radeon_vm *vm)
		radeon_vm_unbind(rdev, vm_evict);
		goto retry;
	}
	vm->pt = radeon_sa_bo_cpu_addr(&vm->sa_bo);
	vm->pt_gpu_addr = radeon_sa_bo_gpu_addr(&vm->sa_bo);
	vm->pt = radeon_sa_bo_cpu_addr(vm->sa_bo);
	vm->pt_gpu_addr = radeon_sa_bo_gpu_addr(vm->sa_bo);
	memset(vm->pt, 0, RADEON_GPU_PAGE_ALIGN(vm->last_pfn * 8));

retry_id:
+2 −2
Original line number Diff line number Diff line
@@ -168,10 +168,10 @@ extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
					struct radeon_sa_manager *sa_manager);
extern int radeon_sa_bo_new(struct radeon_device *rdev,
			    struct radeon_sa_manager *sa_manager,
			    struct radeon_sa_bo *sa_bo,
			    struct radeon_sa_bo **sa_bo,
			    unsigned size, unsigned align);
extern void radeon_sa_bo_free(struct radeon_device *rdev,
			      struct radeon_sa_bo *sa_bo);
			      struct radeon_sa_bo **sa_bo);
#if defined(CONFIG_DEBUG_FS)
extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
					 struct seq_file *m);
+3 −3
Original line number Diff line number Diff line
@@ -127,8 +127,8 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
					     size, 256);
			if (!r) {
				*ib = &rdev->ib_pool.ibs[idx];
				(*ib)->ptr = radeon_sa_bo_cpu_addr(&(*ib)->sa_bo);
				(*ib)->gpu_addr = radeon_sa_bo_gpu_addr(&(*ib)->sa_bo);
				(*ib)->ptr = radeon_sa_bo_cpu_addr((*ib)->sa_bo);
				(*ib)->gpu_addr = radeon_sa_bo_gpu_addr((*ib)->sa_bo);
				(*ib)->fence = fence;
				(*ib)->vm_id = 0;
				(*ib)->is_const_ib = false;
@@ -227,7 +227,7 @@ int radeon_ib_pool_init(struct radeon_device *rdev)
		rdev->ib_pool.ibs[i].fence = NULL;
		rdev->ib_pool.ibs[i].idx = i;
		rdev->ib_pool.ibs[i].length_dw = 0;
		INIT_LIST_HEAD(&rdev->ib_pool.ibs[i].sa_bo.list);
		rdev->ib_pool.ibs[i].sa_bo = NULL;
	}
	rdev->ib_pool.head_id = 0;
	rdev->ib_pool.ready = true;
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