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Commit 2d72feea authored by Harshdeep Dhatt's avatar Harshdeep Dhatt Committed by Mohammed Mirza Mandayappurath Manzoor
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ARM: dts: msm: Open up gpu power levels upto NOM 

Add all the supported gpu power levels and corresponding bus levels.

Change-Id: I3d0c6ce715a4da006aac7ab09cf9914481701387
parent 638c5be7

qcom/lahaina-gpu.dtsi

+57 −14
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ 


		qcom,chipid = <0x06060000>;



		qcom,initial-pwrlevel = <2>;

		qcom,initial-pwrlevel = <4>;



		qcom,no-nap;
@@ -110,29 +110,72 @@ 


			qcom,gpu-pwrlevel@0 {

				reg = <0>;

				qcom,gpu-freq = <540000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;

				qcom,bus-freq = <1>;

				qcom,bus-min = <1>;

				qcom,bus-max = <1>;

				qcom,gpu-freq = <676000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;



				qcom,bus-freq-ddr7 = <11>;

				qcom,bus-min-ddr7 = <11>;

				qcom,bus-max-ddr7 = <11>;



				qcom,bus-freq-ddr8 = <10>;

				qcom,bus-min-ddr8 = <10>;

				qcom,bus-max-ddr8 = <10>;

			};



			qcom,gpu-pwrlevel@1 {

				reg = <1>;

				qcom,gpu-freq = <443000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;

				qcom,bus-freq = <1>;

				qcom,bus-min = <1>;

				qcom,bus-max = <1>;

				qcom,gpu-freq = <608000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;



				qcom,bus-freq-ddr7 = <8>;

				qcom,bus-min-ddr7 = <8>;

				qcom,bus-max-ddr7 = <11>;



				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-min-ddr8 = <7>;

				qcom,bus-max-ddr8 = <10>;

			};



			qcom,gpu-pwrlevel@2 {

				reg = <2>;

				qcom,gpu-freq = <540000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;



				qcom,bus-freq-ddr7 = <8>;

				qcom,bus-min-ddr7 = <5>;

				qcom,bus-max-ddr7 = <8>;



				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-min-ddr8 = <6>;

				qcom,bus-max-ddr8 = <8>;

			};



			qcom,gpu-pwrlevel@3 {

				reg = <3>;

				qcom,gpu-freq = <443000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;



				qcom,bus-freq-ddr7 = <6>;

				qcom,bus-min-ddr7 = <5>;

				qcom,bus-max-ddr7 = <8>;



				qcom,bus-freq-ddr8 = <7>;

				qcom,bus-min-ddr8 = <5>;

				qcom,bus-max-ddr8 = <8>;

			};



			qcom,gpu-pwrlevel@4 {

				reg = <4>;

				qcom,gpu-freq = <315000000>;

				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;

				qcom,bus-freq = <1>;

				qcom,bus-min = <1>;

				qcom,bus-max = <1>;



				qcom,bus-freq-ddr7 = <2>;

				qcom,bus-min-ddr7 = <2>;

				qcom,bus-max-ddr7 = <8>;



				qcom,bus-freq-ddr8 = <2>;

				qcom,bus-min-ddr8 = <2>;

				qcom,bus-max-ddr8 = <8>;

			};

		};

	};