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Commit 2bf6b5b0 authored by Maxime Jourdan's avatar Maxime Jourdan Committed by Neil Armstrong
Browse files

drm/meson: exclusively use the canvas provider module 



Now that the DMC register range is no longer in the bindings, remove any
mention towards it and exclusively use the meson-canvas module.

Signed-off-by: default avatarMaxime Jourdan <mjourdan@baylibre.com>
Acked-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190311105144.7276-3-mjourdan@baylibre.com
parent dc5b9614

drivers/gpu/drm/meson/Makefile

+1 −1
Original line number Diff line number Diff line 
meson-drm-y := meson_drv.o meson_plane.o meson_crtc.o meson_venc_cvbs.o

meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_canvas.o meson_overlay.o

meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_overlay.o



obj-$(CONFIG_DRM_MESON) += meson-drm.o

obj-$(CONFIG_DRM_MESON_DW_HDMI) += meson_dw_hdmi.o

drivers/gpu/drm/meson/meson_canvas.c

deleted100644 → 0
+0 −73
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2016 BayLibre, SAS

 * Author: Neil Armstrong <narmstrong@baylibre.com>

 * Copyright (C) 2015 Amlogic, Inc. All rights reserved.

 * Copyright (C) 2014 Endless Mobile

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation; either version 2 of the

 * License, or (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful, but

 * WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, see <http://www.gnu.org/licenses/>.

 */



#include <linux/kernel.h>

#include <linux/module.h>

#include "meson_drv.h"

#include "meson_canvas.h"

#include "meson_registers.h"



/**

 * DOC: Canvas

 *

 * CANVAS is a memory zone where physical memory frames information

 * are stored for the VIU to scanout.

 */



/* DMC Registers */

#define DMC_CAV_LUT_DATAL	0x48 /* 0x12 offset in data sheet */

#define CANVAS_WIDTH_LBIT	29

#define CANVAS_WIDTH_LWID       3

#define DMC_CAV_LUT_DATAH	0x4c /* 0x13 offset in data sheet */

#define CANVAS_WIDTH_HBIT       0

#define CANVAS_HEIGHT_BIT       9

#define CANVAS_BLKMODE_BIT      24

#define CANVAS_ENDIAN_BIT	26

#define DMC_CAV_LUT_ADDR	0x50 /* 0x14 offset in data sheet */

#define CANVAS_LUT_WR_EN        (0x2 << 8)

#define CANVAS_LUT_RD_EN        (0x1 << 8)



void meson_canvas_setup(struct meson_drm *priv,

			uint32_t canvas_index, uint32_t addr,

			uint32_t stride, uint32_t height,

			unsigned int wrap,

			unsigned int blkmode,

			unsigned int endian)

{

	unsigned int val;



	regmap_write(priv->dmc, DMC_CAV_LUT_DATAL,

		(((addr + 7) >> 3)) |

		(((stride + 7) >> 3) << CANVAS_WIDTH_LBIT));



	regmap_write(priv->dmc, DMC_CAV_LUT_DATAH,

		((((stride + 7) >> 3) >> CANVAS_WIDTH_LWID) <<

						CANVAS_WIDTH_HBIT) |

		(height << CANVAS_HEIGHT_BIT) |

		(wrap << 22) |

		(blkmode << CANVAS_BLKMODE_BIT) |

		(endian << CANVAS_ENDIAN_BIT));



	regmap_write(priv->dmc, DMC_CAV_LUT_ADDR,

			CANVAS_LUT_WR_EN | canvas_index);



	/* Force a read-back to make sure everything is flushed. */

	regmap_read(priv->dmc, DMC_CAV_LUT_DATAH, &val);

}

drivers/gpu/drm/meson/meson_canvas.h

deleted100644 → 0
+0 −51
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2016 BayLibre, SAS

 * Author: Neil Armstrong <narmstrong@baylibre.com>

 * Copyright (C) 2014 Endless Mobile

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation; either version 2 of the

 * License, or (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful, but

 * WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU

 * General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, see <http://www.gnu.org/licenses/>.

 */



/* Canvas LUT Memory */



#ifndef __MESON_CANVAS_H

#define __MESON_CANVAS_H



#define MESON_CANVAS_ID_OSD1	0x4e

#define MESON_CANVAS_ID_VD1_0	0x60

#define MESON_CANVAS_ID_VD1_1	0x61

#define MESON_CANVAS_ID_VD1_2	0x62



/* Canvas configuration. */

#define MESON_CANVAS_WRAP_NONE	0x00

#define	MESON_CANVAS_WRAP_X	0x01

#define	MESON_CANVAS_WRAP_Y	0x02



#define	MESON_CANVAS_BLKMODE_LINEAR	0x00

#define	MESON_CANVAS_BLKMODE_32x32	0x01

#define	MESON_CANVAS_BLKMODE_64x64	0x02



#define MESON_CANVAS_ENDIAN_SWAP16	0x1

#define MESON_CANVAS_ENDIAN_SWAP32	0x3

#define MESON_CANVAS_ENDIAN_SWAP64	0x7

#define MESON_CANVAS_ENDIAN_SWAP128	0xf



void meson_canvas_setup(struct meson_drm *priv,

			uint32_t canvas_index, uint32_t addr,

			uint32_t stride, uint32_t height,

			unsigned int wrap,

			unsigned int blkmode,

			unsigned int endian);



#endif /* __MESON_CANVAS_H */

drivers/gpu/drm/meson/meson_crtc.c

+25 −59
Original line number Diff line number Diff line
@@ -37,7 +37,6 @@ 
#include "meson_venc.h"

#include "meson_vpp.h"

#include "meson_viu.h"

#include "meson_canvas.h"

#include "meson_registers.h"



/* CRTC definition */
@@ -214,16 +213,10 @@ void meson_crtc_irq(struct meson_drm *priv) 
		writel_relaxed(priv->viu.osd_sc_v_ctrl0,

				priv->io_base + _REG(VPP_OSD_VSC_CTRL0));



		if (priv->canvas)

		meson_canvas_config(priv->canvas, priv->canvas_id_osd1,

				priv->viu.osd1_addr, priv->viu.osd1_stride,

				priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE,

				MESON_CANVAS_BLKMODE_LINEAR, 0);

		else

			meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1,

				priv->viu.osd1_addr, priv->viu.osd1_stride,

				priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE,

				MESON_CANVAS_BLKMODE_LINEAR, 0);



		/* Enable OSD1 */

		writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND,
@@ -237,7 +230,6 @@ void meson_crtc_irq(struct meson_drm *priv) 


		switch (priv->viu.vd1_planes) {

		case 3:

			if (priv->canvas)

			meson_canvas_config(priv->canvas,

					    priv->canvas_id_vd1_2,

					    priv->viu.vd1_addr2,
@@ -246,17 +238,8 @@ void meson_crtc_irq(struct meson_drm *priv) 
					    MESON_CANVAS_WRAP_NONE,

					    MESON_CANVAS_BLKMODE_LINEAR,

					    MESON_CANVAS_ENDIAN_SWAP64);

			else

				meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_2,

						   priv->viu.vd1_addr2,

						   priv->viu.vd1_stride2,

						   priv->viu.vd1_height2,

						   MESON_CANVAS_WRAP_NONE,

						   MESON_CANVAS_BLKMODE_LINEAR,

						   MESON_CANVAS_ENDIAN_SWAP64);

		/* fallthrough */

		case 2:

			if (priv->canvas)

			meson_canvas_config(priv->canvas,

					    priv->canvas_id_vd1_1,

					    priv->viu.vd1_addr1,
@@ -265,17 +248,8 @@ void meson_crtc_irq(struct meson_drm *priv) 
					    MESON_CANVAS_WRAP_NONE,

					    MESON_CANVAS_BLKMODE_LINEAR,

					    MESON_CANVAS_ENDIAN_SWAP64);

			else

				meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_1,

						   priv->viu.vd1_addr2,

						   priv->viu.vd1_stride2,

						   priv->viu.vd1_height2,

						   MESON_CANVAS_WRAP_NONE,

						   MESON_CANVAS_BLKMODE_LINEAR,

						   MESON_CANVAS_ENDIAN_SWAP64);

		/* fallthrough */

		case 1:

			if (priv->canvas)

			meson_canvas_config(priv->canvas,

					    priv->canvas_id_vd1_0,

					    priv->viu.vd1_addr0,
@@ -284,14 +258,6 @@ void meson_crtc_irq(struct meson_drm *priv) 
					    MESON_CANVAS_WRAP_NONE,

					    MESON_CANVAS_BLKMODE_LINEAR,

					    MESON_CANVAS_ENDIAN_SWAP64);

			else

				meson_canvas_setup(priv, MESON_CANVAS_ID_VD1_0,

						   priv->viu.vd1_addr2,

						   priv->viu.vd1_stride2,

						   priv->viu.vd1_height2,

						   MESON_CANVAS_WRAP_NONE,

						   MESON_CANVAS_BLKMODE_LINEAR,

						   MESON_CANVAS_ENDIAN_SWAP64);

		};



		writel_relaxed(priv->viu.vd1_if0_gen_reg,

drivers/gpu/drm/meson/meson_drv.c

+24 −44
Original line number Diff line number Diff line
@@ -48,7 +48,6 @@ 
#include "meson_vpp.h"

#include "meson_viu.h"

#include "meson_venc.h"

#include "meson_canvas.h"

#include "meson_registers.h"



#define DRIVER_NAME "meson"
@@ -231,7 +230,11 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) 
	}



	priv->canvas = meson_canvas_get(dev);

	if (!IS_ERR(priv->canvas)) {

	if (IS_ERR(priv->canvas)) {

		ret = PTR_ERR(priv->canvas);

		goto free_drm;

	}



	ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);

	if (ret)

		goto free_drm;
@@ -253,29 +256,6 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) 
		meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);

		goto free_drm;

	}

	} else {

		priv->canvas = NULL;



		res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");

		if (!res) {

			ret = -EINVAL;

			goto free_drm;

		}

		/* Simply ioremap since it may be a shared register zone */

		regs = devm_ioremap(dev, res->start, resource_size(res));

		if (!regs) {

			ret = -EADDRNOTAVAIL;

			goto free_drm;

		}



		priv->dmc = devm_regmap_init_mmio(dev, regs,

						  &meson_regmap_config);

		if (IS_ERR(priv->dmc)) {

			dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");

			ret = PTR_ERR(priv->dmc);

			goto free_drm;

		}

	}



	priv->vsync_irq = platform_get_irq(pdev, 0);