Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2b8d9d9b authored by Manikanta Pubbisetty's avatar Manikanta Pubbisetty Committed by Madan Koyyalamudi
Browse files

qcacmn: do a dummy read to flush pending writes 

Currently before suspending the device, we are draining
out the TX/RX SRNGs. The HP/TP updates which are done as
part of this will be posted writes(there won't be any link
levelccompletions for write transactions), there are chances
that we might end up updating HP/TP after the device enters
low power mode leading to system crashes.

In order to avoid this scenario, do a dummy read before
device is suspended; this will ensure all pendings writes are
flushed before read returns.

CRs-Fixed: 2919459

Change-Id: I5ab77f91fe14c506444bdea1587acfb34224fc69
parent cc14ff65

dp/wifi3.0/dp_main.c

+7 −0
Original line number Diff line number Diff line
@@ -11046,6 +11046,7 @@ static void dp_drain_txrx(struct cdp_soc_t *soc_handle) 
	struct dp_soc *soc = (struct dp_soc *)soc_handle;

	uint32_t cur_tx_limit, cur_rx_limit;

	uint32_t budget = 0xffff;

	uint32_t val;

	int i;



	cur_tx_limit = soc->wlan_cfg_ctx->tx_comp_loop_pkt_limit;
@@ -11063,6 +11064,12 @@ static void dp_drain_txrx(struct cdp_soc_t *soc_handle) 
		dp_service_srngs(&soc->intr_ctx[i], budget);



	dp_update_soft_irq_limits(soc, cur_tx_limit, cur_rx_limit);



	/* Do a dummy read at offset 0; this will ensure all

	 * pendings writes(HP/TP) are flushed before read returns.

	 */

	val = HAL_REG_READ((struct hal_soc *)soc->hal_soc, 0);

	dp_debug("Register value at offset 0: %u\n", val);

}

#endif