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Commit 2b014fcc authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull two slave-dmaengine fixes from Vinod Koul:
 "One fixes the correct use of clock API in imx driver and the other
  enables clock for tegra driver, which is used for other tegra driver
  conversion to dmanegine in -next."

* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
  dma: tegra: enable/disable dma clock
  dma: imx-dma: Fix kernel crash due to missing clock conversion
parents d3b8e0dc ffc49306
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+25 −11
Original line number Diff line number Diff line
@@ -172,7 +172,8 @@ struct imxdma_engine {
	struct device_dma_parameters	dma_parms;
	struct dma_device		dma_device;
	void __iomem			*base;
	struct clk			*dma_clk;
	struct clk			*dma_ahb;
	struct clk			*dma_ipg;
	spinlock_t			lock;
	struct imx_dma_2d_config	slots_2d[IMX_DMA_2D_SLOTS];
	struct imxdma_channel		channel[IMX_DMA_CHANNELS];
@@ -976,10 +977,20 @@ static int __init imxdma_probe(struct platform_device *pdev)
		return 0;
	}

	imxdma->dma_clk = clk_get(NULL, "dma");
	if (IS_ERR(imxdma->dma_clk))
		return PTR_ERR(imxdma->dma_clk);
	clk_enable(imxdma->dma_clk);
	imxdma->dma_ipg = devm_clk_get(&pdev->dev, "ipg");
	if (IS_ERR(imxdma->dma_ipg)) {
		ret = PTR_ERR(imxdma->dma_ipg);
		goto err_clk;
	}

	imxdma->dma_ahb = devm_clk_get(&pdev->dev, "ahb");
	if (IS_ERR(imxdma->dma_ahb)) {
		ret = PTR_ERR(imxdma->dma_ahb);
		goto err_clk;
	}

	clk_prepare_enable(imxdma->dma_ipg);
	clk_prepare_enable(imxdma->dma_ahb);

	/* reset DMA module */
	imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);
@@ -988,16 +999,14 @@ static int __init imxdma_probe(struct platform_device *pdev)
		ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", imxdma);
		if (ret) {
			dev_warn(imxdma->dev, "Can't register IRQ for DMA\n");
			kfree(imxdma);
			return ret;
			goto err_enable;
		}

		ret = request_irq(MX1_DMA_ERR, imxdma_err_handler, 0, "DMA", imxdma);
		if (ret) {
			dev_warn(imxdma->dev, "Can't register ERRIRQ for DMA\n");
			free_irq(MX1_DMA_INT, NULL);
			kfree(imxdma);
			return ret;
			goto err_enable;
		}
	}

@@ -1094,7 +1103,10 @@ static int __init imxdma_probe(struct platform_device *pdev)
		free_irq(MX1_DMA_INT, NULL);
		free_irq(MX1_DMA_ERR, NULL);
	}

err_enable:
	clk_disable_unprepare(imxdma->dma_ipg);
	clk_disable_unprepare(imxdma->dma_ahb);
err_clk:
	kfree(imxdma);
	return ret;
}
@@ -1114,6 +1126,8 @@ static int __exit imxdma_remove(struct platform_device *pdev)
		free_irq(MX1_DMA_ERR, NULL);
	}

	clk_disable_unprepare(imxdma->dma_ipg);
	clk_disable_unprepare(imxdma->dma_ahb);
	kfree(imxdma);

        return 0;
+17 −1
Original line number Diff line number Diff line
@@ -1119,15 +1119,21 @@ struct dma_async_tx_descriptor *tegra_dma_prep_dma_cyclic(
static int tegra_dma_alloc_chan_resources(struct dma_chan *dc)
{
	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
	struct tegra_dma *tdma = tdc->tdma;
	int ret;

	dma_cookie_init(&tdc->dma_chan);
	tdc->config_init = false;
	return 0;
	ret = clk_prepare_enable(tdma->dma_clk);
	if (ret < 0)
		dev_err(tdc2dev(tdc), "clk_prepare_enable failed: %d\n", ret);
	return ret;
}

static void tegra_dma_free_chan_resources(struct dma_chan *dc)
{
	struct tegra_dma_channel *tdc = to_tegra_dma_chan(dc);
	struct tegra_dma *tdma = tdc->tdma;

	struct tegra_dma_desc *dma_desc;
	struct tegra_dma_sg_req *sg_req;
@@ -1163,6 +1169,7 @@ static void tegra_dma_free_chan_resources(struct dma_chan *dc)
		list_del(&sg_req->node);
		kfree(sg_req);
	}
	clk_disable_unprepare(tdma->dma_clk);
}

/* Tegra20 specific DMA controller information */
@@ -1255,6 +1262,13 @@ static int __devinit tegra_dma_probe(struct platform_device *pdev)
		}
	}

	/* Enable clock before accessing registers */
	ret = clk_prepare_enable(tdma->dma_clk);
	if (ret < 0) {
		dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
		goto err_pm_disable;
	}

	/* Reset DMA controller */
	tegra_periph_reset_assert(tdma->dma_clk);
	udelay(2);
@@ -1265,6 +1279,8 @@ static int __devinit tegra_dma_probe(struct platform_device *pdev)
	tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0);
	tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFFul);

	clk_disable_unprepare(tdma->dma_clk);

	INIT_LIST_HEAD(&tdma->dma_dev.channels);
	for (i = 0; i < cdata->nr_channels; i++) {
		struct tegra_dma_channel *tdc = &tdma->channels[i];