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Commit 2997520c authored by Marek Szyprowski's avatar Marek Szyprowski Committed by Krzysztof Kozlowski
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ARM: exynos: Set MCPM as mandatory for Exynos542x/5800 SoCs



Support for Exynos5420/5422/5800 SoCs requires MCPM to properly boot all
CPU cores on all currectly supported platforms: Peach Pit (Exynos5420),
Odroid XU3/XU3lite/XU4/HC1 (Exynos5422) and Peach Pi (Exynos5800).
Without it some CPU cores fail to come online. Remove then the ability to
disable MCPM and make it mandatory when Exynos542x/5800 support is
enabled.

Signed-off-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 98a3308e
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+0 −1
Original line number Original line Diff line number Diff line
@@ -9,7 +9,6 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS3=y
CONFIG_ARCH_EXYNOS3=y
CONFIG_EXYNOS5420_MCPM=y
CONFIG_SMP=y
CONFIG_SMP=y
CONFIG_BIG_LITTLE=y
CONFIG_BIG_LITTLE=y
CONFIG_NR_CPUS=8
CONFIG_NR_CPUS=8
+0 −1
Original line number Original line Diff line number Diff line
@@ -33,7 +33,6 @@ CONFIG_MACH_BERLIN_BG2CD=y
CONFIG_MACH_BERLIN_BG2Q=y
CONFIG_MACH_BERLIN_BG2Q=y
CONFIG_ARCH_DIGICOLOR=y
CONFIG_ARCH_DIGICOLOR=y
CONFIG_ARCH_EXYNOS=y
CONFIG_ARCH_EXYNOS=y
CONFIG_EXYNOS5420_MCPM=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_HISI=y
CONFIG_ARCH_HISI=y
CONFIG_ARCH_HI3xxx=y
CONFIG_ARCH_HI3xxx=y
+3 −9
Original line number Original line Diff line number Diff line
@@ -106,21 +106,15 @@ config SOC_EXYNOS5420
	bool "SAMSUNG EXYNOS5420"
	bool "SAMSUNG EXYNOS5420"
	default y
	default y
	depends on ARCH_EXYNOS5
	depends on ARCH_EXYNOS5
	select MCPM if SMP
	select ARM_CCI400_PORT_CTRL
	select ARM_CPU_SUSPEND


config SOC_EXYNOS5800
config SOC_EXYNOS5800
	bool "SAMSUNG EXYNOS5800"
	bool "SAMSUNG EXYNOS5800"
	default y
	default y
	depends on SOC_EXYNOS5420
	depends on SOC_EXYNOS5420


config EXYNOS5420_MCPM
	bool "Exynos5420 Multi-Cluster PM support"
	depends on MCPM && SOC_EXYNOS5420
	select ARM_CCI400_PORT_CTRL
	select ARM_CPU_SUSPEND
	help
	  This is needed to provide CPU and cluster power management
	  on Exynos5420 implementing big.LITTLE.

config EXYNOS_CPU_SUSPEND
config EXYNOS_CPU_SUSPEND
	bool
	bool
	select ARM_CPU_SUSPEND
	select ARM_CPU_SUSPEND
+1 −1
Original line number Original line Diff line number Diff line
@@ -18,5 +18,5 @@ plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_exynos-smc.o		:=-Wa,-march=armv7-a$(plus_sec)
AFLAGS_exynos-smc.o		:=-Wa,-march=armv7-a$(plus_sec)
AFLAGS_sleep.o			:=-Wa,-march=armv7-a$(plus_sec)
AFLAGS_sleep.o			:=-Wa,-march=armv7-a$(plus_sec)


obj-$(CONFIG_EXYNOS5420_MCPM)	+= mcpm-exynos.o
obj-$(CONFIG_MCPM)		+= mcpm-exynos.o
CFLAGS_mcpm-exynos.o		+= -march=armv7-a
CFLAGS_mcpm-exynos.o		+= -march=armv7-a
+3 −3
Original line number Original line Diff line number Diff line
@@ -268,7 +268,7 @@ static int exynos5420_cpu_suspend(unsigned long arg)
	unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
	unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
	unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);
	unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0);


	if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM)) {
	if (IS_ENABLED(CONFIG_MCPM)) {
		mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume);
		mcpm_set_entry_vector(cpu, cluster, exynos_cpu_resume);
		mcpm_cpu_suspend();
		mcpm_cpu_suspend();
	}
	}
@@ -351,7 +351,7 @@ static void exynos5420_pm_prepare(void)
	exynos_pm_enter_sleep_mode();
	exynos_pm_enter_sleep_mode();


	/* ensure at least INFORM0 has the resume address */
	/* ensure at least INFORM0 has the resume address */
	if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM))
	if (IS_ENABLED(CONFIG_MCPM))
		pmu_raw_writel(__pa_symbol(mcpm_entry_point), S5P_INFORM0);
		pmu_raw_writel(__pa_symbol(mcpm_entry_point), S5P_INFORM0);


	tmp = pmu_raw_readl(EXYNOS_L2_OPTION(0));
	tmp = pmu_raw_readl(EXYNOS_L2_OPTION(0));
@@ -455,7 +455,7 @@ static void exynos5420_prepare_pm_resume(void)
	mpidr = read_cpuid_mpidr();
	mpidr = read_cpuid_mpidr();
	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);
	cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1);


	if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM))
	if (IS_ENABLED(CONFIG_MCPM))
		WARN_ON(mcpm_cpu_powered_up());
		WARN_ON(mcpm_cpu_powered_up());


	if (IS_ENABLED(CONFIG_HW_PERF_EVENTS) && cluster != 0) {
	if (IS_ENABLED(CONFIG_HW_PERF_EVENTS) && cluster != 0) {